Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c

[coreboot.git] / src / mainboard / tyan / s2875 / romstage.c

diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c
index 50b12f1ff6dbaa5b056b29cfba71defc76e1d0f7..9429d39e5fc12f3b43f393d512a64b7b6748090e 100644 (file)
--- a/src/mainboard/tyan/s2875/romstage.c
+++ b/src/mainboard/tyan/s2875/romstage.c
@@ -1,6 +1,4 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -9,11 +7,9 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
+#include <pc80/mc146818rtc.h>
+#include <console/console.h>
+#include <lib.h>
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
@@ -27,7 +23,7 @@
 #include "northbridge/amd/amdk8/debug.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 
-#include "cpu/amd/mtrr/amd_earlymtrr.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
 #include "northbridge/amd/amdk8/setup_resource_map.c"
@@ -66,7 +62,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define QRANK_DIMM_SUPPORT 1
 
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
@@ -78,74 +73,16 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #endif
 #include "cpu/amd/dualcore/dualcore.c"
 
-#include "cpu/amd/car/copy_and_run.c"
+
 
 #include "cpu/amd/car/post_cache_as_ram.c"
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx)/* inputs */
-                );
-
- fallback_image:
-       ;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const struct mem_controller cpu[] = {
                {
@@ -172,6 +109,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!cpu_init_detectedx && boot_cpu()) {
+               /* Nothing special needs to be done to find bus 0 */
+               /* Allow the HT devices to be found */
+
+               enumerate_ht_chain();
+
+               amd8111_enable_rom();
+        }
+
         if (bist == 0) {
                init_cpus(cpu_init_detectedx);
         }
@@ -186,7 +132,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
         setup_default_resource_map();
 
        needs_reset = setup_coherent_ht_domain();
-       
+
 #if CONFIG_LOGICAL_CPUS==1
         // It is said that we should start core1 after all core0 launched
         start_other_cores();
@@ -194,7 +140,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
         needs_reset |= ht_setup_chains_x();
 
                if (needs_reset) {
-                       print_info("ht reset -\r\n");
+                       print_info("ht reset -\n");
                        soft_reset();
                }
 
@@ -206,3 +152,4 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
        post_cache_as_ram();
 
 }
+