add_mainboard_resources is necessary for some boards (eg. kontron), but

[coreboot.git] / src / mainboard / tyan / s2850 / cache_as_ram_auto.c

diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
index 38aba178353aa9cc77a68f2d04c5db3dc88d3692..318903d227e8c5f349128b0b60d7e4ca3ad5967d 100644 (file)
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
@@ -7,6 +7,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
+#include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
@@ -47,31 +48,7 @@ static void post_code(uint8_t value) {
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
-static void hard_reset(void)
-{
-        device_t dev;
-
-        /* Find the device */
-        dev = PCI_DEV(node_link_to_bus(0, 0), 0x04, 3);
-
-        set_bios_reset();
-
-        /* enable cf9 */
-        pci_write_config8(dev, 0x41, 0xf1);
-        /* reset */
-        outb(0x0e, 0x0cf9);
-}
-
-static void soft_reset(void)
-{
-        device_t dev;
-
-        /* Find the device */
-        dev = PCI_DEV(node_link_to_bus(0, 0), 0x04, 0);
-
-        set_bios_reset();
-        pci_write_config8(dev, 0x47, 1);
-}
+#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
 
 static void memreset_setup(void)
 {
@@ -103,8 +80,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define K8_4RANK_DIMM_SUPPORT 1
-
 #include "northbridge/amd/amdk8/raminit.c"
 #include "northbridge/amd/amdk8/resourcemap.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
@@ -145,7 +120,7 @@ void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
 
         enumerate_ht_chain();
 
-        /* Setup the ck804 */
+        /* Setup the amd8111 */
         amd8111_enable_rom();
 
         /* Is this a deliberate reset by the bios */
@@ -200,7 +175,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
        };
 
         int needs_reset;
-       unsigned cpu_reset = 0;
 
         if (bist == 0) {
                init_cpus(cpu_init_detectedx);
@@ -233,7 +207,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
        enable_smbus();
 
        memreset_setup();
-       sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+       sdram_initialize(ARRAY_SIZE(cpu), cpu);
 
-       post_cache_as_ram(cpu_reset);
+       post_cache_as_ram();
 }