AMD Geode cpus: apply un-written naming rules

[coreboot.git] / src / mainboard / traverse / geos / romstage.c

diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index cfdbde9b1fedac0ee4041f77bdab10468e668a1d..588681bfbb1071ae54408d3f32dd7fb8390eb36f 100644 (file)
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -19,20 +19,20 @@
  */
 
 #include <stdint.h>
+#include <stdlib.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
+#include <lib.h>
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
-#include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
-
-#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
-#include "southbridge/amd/cs5536/cs5536_early_setup.c"
+#include <spd.h>
+#include "southbridge/amd/cs5536/early_smbus.c"
+#include "southbridge/amd/cs5536/early_setup.c"
 
 static inline int spd_read_byte(unsigned int device, unsigned int address)
 {
@@ -42,28 +42,19 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #define ManualConf 1           /* Do automatic strapped PLL config */
 #define PLLMSRhi 0x0000059C    /* manual settings for the PLL */
 #define PLLMSRlo 0x00DE602E
-#define DIMM0 0xA0
-#define DIMM1 0xA2
 
 #include "northbridge/amd/lx/raminit.h"
 #include "northbridge/amd/lx/pll_reset.c"
 #include "northbridge/amd/lx/raminit.c"
 #include "lib/generic_sdram.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-#include "cpu/amd/model_lx/msrinit.c"
-
-static void mb_gpio_init(void)
-{
-       /* Early mainboard specific GPIO setup. */
-}
+#include "cpu/amd/geode_lx/cpureginit.c"
+#include "cpu/amd/geode_lx/syspreinit.c"
+#include "cpu/amd/geode_lx/msrinit.c"
 
 void main(unsigned long bist)
 {
-       post_code(0x01);
-
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}
+               {.channel0 = {DIMM0, DIMM1}}
        };
 
        SystemPreInit();
@@ -77,10 +68,8 @@ void main(unsigned long bist)
        /* cs5536_disable_internal_uart: disable them for now, set them
         * up later...
         */
-       /* If debug. real setup done in chipset init via Config.lb. */
+       /* If debug. real setup done in chipset init via devicetree.cb. */
        cs5536_setup_onchipuart(1);
-       mb_gpio_init();
-       uart_init();
        console_init();
 
        /* Halt if there was a built in self test failure */
@@ -92,9 +81,6 @@ void main(unsigned long bist)
 
        sdram_initialize(1, memctrl);
 
-       /* Check memory. */
-       /* ram_check(0x00000000, 640 * 1024); */
-
        /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
        return;
 }