remove usbdebug.h include from mainboard/romstage code

[coreboot.git] / src / mainboard / technexion / tim8690 / romstage.c

diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index 276ca08682862ceb267b5a3baf1a2a8aab9ae7f6..97bc4e1dddbcb60daf89afd0899370116a19c4ef 100644 (file)
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -39,13 +39,12 @@
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
-#include "superio/ite/it8712f/it8712f_early_serial.c"
-#include <usbdebug.h>
+#include "superio/ite/it8712f/early_serial.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/amd/rs690/rs690_early_setup.c"
-#include "southbridge/amd/sb600/sb600_early_setup.c"
+#include "southbridge/amd/rs690/early_setup.c"
+#include "southbridge/amd/sb600/early_setup.c"
 
 static void memreset(int controllers, const struct mem_controller *ctrl) { }
 static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -93,12 +92,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        /* it8712f_enable_serial does not use its 1st parameter. */
        it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
        it8712f_kill_watchdog();
-       uart_init();
-
-#if CONFIG_USBDEBUG
-       sb600_enable_usbdebug(0);
-       early_usbdebug_init();
-#endif
 
        console_init();