devicetree.cb: Only add as many entries as there are DIMM slots.

[coreboot.git] / src / mainboard / technexion / tim8690 / devicetree.cb

diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb
index cb0691489d0f0377e7a6fbc1b52bd96b2b025636..55a2e05323cb7aaeb3513c83861b0d50f3679e69 100644 (file)
--- a/src/mainboard/technexion/tim8690/devicetree.cb
+++ b/src/mainboard/technexion/tim8690/devicetree.cb
@@ -1,7 +1,17 @@
+#Define gpp_configuration,     A=0, B=1, C=2, D=3, E=4(default)
+#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
+#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
+#                      1: the system allows a PCIE link to be established on Dev2 or Dev3.
+#Define gfx_dual_slot, 0: single slot, 1: dual slot
+#Define gfx_lane_reversal, 0: disable lane reversal, 1: enable
+#Define gfx_tmds, 0: didn't support TMDS, 1: support
+#Define gfx_compliance, 0: didn't support compliance, 1: support
+#Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
+#Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
-       device apic_cluster 0 on
+       device lapic_cluster 0 on
                chip cpu/amd/socket_S1G1
-               device apic 0 on end
+               device lapic 0 on end
                end
        end
        device pci_domain 0 on
@@ -10,10 +20,7 @@ chip northbridge/amd/amdk8/root_complex
                                chip southbridge/amd/rs690
                                        device pci 0.0 on end # HT      0x7910
                                        device pci 1.0 on  # Internal Graphics P2P bridge 0x7912
-                                               chip drivers/pci/onboard
-                                                       device pci 5.0 on end   # Internal Graphics 0x791F
-                                                       register "rom_address" = "0xfff80000"
-                                               end
+                                               device pci 5.0 on end   # Internal Graphics 0x791F
                                        end
                                        device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
                                        device pci 3.0 off end # PCIE P2P bridge        0x791b
@@ -22,7 +29,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 6.0 on end # PCIE P2P bridge 0x7916
                                        device pci 7.0 on end # PCIE P2P bridge 0x7917
                                        device pci 8.0 off end # NB/SB Link P2P bridge
-                                       register "vga_rom_address" = "0xfff80000"
                                        register "gpp_configuration" = "4"
                                        register "port_enable" = "0xfc"
                                        register "gfx_dev2_dev3" = "1"
@@ -48,12 +54,6 @@ chip northbridge/amd/amdk8/root_complex
                                                chip drivers/generic/generic #dimm 0-0-1
                                                        device i2c 51 on end
                                                end
-                                               chip drivers/generic/generic #dimm 0-1-0
-                                                       device i2c 52 on end
-                                               end
-                                               chip drivers/generic/generic #dimm 0-1-1
-                                                       device i2c 53 on end
-                                               end
                                        end # SM
                                        device pci 14.1 on end # IDE    0x438c
                                        device pci 14.2 on end # HDA    0x4383
@@ -100,8 +100,6 @@ chip northbridge/amd/amdk8/root_complex
                                        device pci 14.4 on end # PCI 0x4384
                                        device pci 14.5 on end # ACI 0x4382
                                        device pci 14.6 on end # MCI 0x438e
-                                       register "ide0_enable" = "1"
-                                       register "sata0_enable" = "1"
                                        register "hda_viddid" = "0x10ec0882"
                                end     #southbridge/amd/sb600
                        end #  device pci 18.0