Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / technexion / tim5690 / romstage.c

diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c
index a222a1a243bd66325cde40c5a7cc7d0e9ea7b244..f9f1e70ce1f7d0e288585c32d829ed26cd5c2e96 100644 (file)
--- a/src/mainboard/technexion/tim5690/romstage.c
+++ b/src/mainboard/technexion/tim5690/romstage.c
@@ -17,23 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define ASSEMBLY 1
-
-
-#define RAMINIT_SYSINFO 1
-#define K8_SET_FIDVID 1
-#define QRANK_DIMM_SUPPORT 1
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
 #define RC0 (6<<8)
 #define RC1 (7<<8)
 
-#define DIMM0 0x50
-#define DIMM1 0x51
-
-#define ICS951462_ADDRESS      0x69
 #define SMBUS_HUB 0x71
 
 #include <stdint.h>
@@ -43,42 +29,27 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-
-#define post_code(x) outb(x, 0x80)
-
+#include <pc80/mc146818rtc.h>
+#include <console/console.h>
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
-
+#include <spd.h>
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
-
-#include "cpu/amd/mtrr/amd_earlymtrr.c"
+#include <usbdebug.h>
+#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
-
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-
 #include "southbridge/amd/rs690/rs690_early_setup.c"
 #include "southbridge/amd/sb600/sb600_early_setup.c"
 
-/* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/
-static void memreset(int controllers, const struct mem_controller *ctrl)
-{
-}
+static void memreset(int controllers, const struct mem_controller *ctrl) { }
+static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
-/* called in raminit_f.c */
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
-}
-
-/*called in raminit_f.c */
 static inline int spd_read_byte(u32 device, u32 address)
 {
        return smbus_read_byte(device, address);
@@ -90,19 +61,12 @@ static inline int spd_read_byte(u32 device, u32 address)
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "lib/generic_sdram.c"
 #include "resourcemap.c"
-
 #include "cpu/amd/dualcore/dualcore.c"
-
-#include "cpu/amd/car/copy_and_run.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
-
 #include "cpu/amd/model_fxx/init_cpus.c"
-
 #include "cpu/amd/model_fxx/fidvid.c"
-
 #include "tn_post_code.c"
 #include "speaker.c"
-
 #include "northbridge/amd/amdk8/early_ht.c"
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
@@ -118,7 +82,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                /* Nothing special needs to be done to find bus 0 */
                /* Allow the HT devices to be found */
                enumerate_ht_chain();
-
                /* sb600_lpc_port80(); */
                sb600_pci_port80();
        }
@@ -126,9 +89,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        technexion_post_code_init();
        technexion_post_code(LED_MESSAGE_START);
 
-       if (bist == 0) {
+       if (bist == 0)
                bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
-       }
 
        enable_rs690_dev8();
        sb600_lpc_init();
@@ -137,6 +99,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        it8712f_enable_serial(0, CONFIG_TTYS0_BASE);
        it8712f_kill_watchdog();
        uart_init();
+
+#if CONFIG_USBDEBUG
+       sb600_enable_usbdebug(0);
+       early_usbdebug_init();
+#endif
+
        console_init();
 
        /* Halt if there was a built in self test failure */
@@ -163,8 +131,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        /* Check to see if processor is capable of changing FIDVID  */
        /* otherwise it will throw a GP# when reading FIDVID_STATUS */
        cpuid1 = cpuid(0x80000007);
-       if( (cpuid1.edx & 0x6) == 0x6 ) {
-
+       if ((cpuid1.edx & 0x6) == 0x6) {
                /* Read FIDVID_STATUS */
                msr=rdmsr(0xc0010042);
                printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
@@ -176,7 +143,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                /* show final fid and vid */
                msr=rdmsr(0xc0010042);
                printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
-
        } else {
                printk(BIOS_DEBUG, "Changing FIDVID not supported\n");
        }
@@ -186,9 +152,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        rs690_htinit();
        printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset);
 
-
        if (needs_reset) {
-               print_info("ht reset -\r\n");
+               print_info("ht reset -\n");
                soft_reset();
        }