#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#define RECVENA_CONFIG 0x0808090a
#define RECVENB_CONFIG 0x0808090a
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
#include "northbridge/intel/e7520/raminit.c"
#include "lib/generic_sdram.c"
+#include "arch/i386/lib/stages.c"
static void main(unsigned long bist)
{
/*
- *
- *
+ *
+ *
*/
static const struct mem_controller mch[] = {
{
.node_id = 0,
+ /*
.f0 = PCI_DEV(0, 0x00, 0),
.f1 = PCI_DEV(0, 0x00, 1),
.f2 = PCI_DEV(0, 0x00, 2),
.f3 = PCI_DEV(0, 0x00, 3),
+ */
.channel0 = {(0xa<<3)|3, (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, },
.channel1 = {(0xa<<3)|7, (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, },
}
/* Skip this if there was a built in self test failure */
early_mtrr_init();
if (memory_initialized()) {
- asm volatile ("jmp __cpu_reset");
+ skip_romstage();
}
}
/* Setup the console */
#endif
disable_watchdogs();
// dump_ipmi_registers();
- mainboard_set_e7520_leds();
-// memreset_setup();
+ mainboard_set_e7520_leds();
sdram_initialize(ARRAY_SIZE(mch), mch);
#if 0
dump_pci_devices();
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 0 // temporarily disabled
+#if 0 // temporarily disabled
/* Check the first 1M */
// ram_check(0x00000000, 0x000100000);
// ram_check(0x00000000, 0x000a0000);
#if 0
ram_check(0x00000000, 0x02000000);
#endif
-
-#if 0
+
+#if 0
while(1) {
hlt();
}