Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / supermicro / x6dhr_ig / romstage.c

diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 4dc5efe94a1d2f7038f32733561b914d55d6eb27..839be041842c49c21d2784bde242627b5d21be01 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -19,6 +19,7 @@
 #include "superio/winbond/w83627hf/w83627hf_early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 #define HIDDEN_SERIAL_DEV  PNP_DEV(0x2e, W83627HF_SP2)
@@ -44,10 +45,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 static void main(unsigned long bist)
 {
-       /*
-        *
-        *
-        */
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
@@ -57,18 +54,18 @@ static void main(unsigned long bist)
                        .f2 = PCI_DEV(0, 0x00, 2),
                        .f3 = PCI_DEV(0, 0x00, 3),
                        */
-                       .channel0 = {(0xa<<3)|3, (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, },
-                       .channel1 = {(0xa<<3)|7, (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, },
+                       .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
+                       .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
                }
        };
 
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
+               if (memory_initialized())
                        skip_romstage();
-               }
        }
+
        /* Setup the console */
        outb(0x87,0x2e);
        outb(0x87,0x2e);
@@ -84,16 +81,13 @@ static void main(unsigned long bist)
        /* config LPC decode for flash memory access */
         device_t dev;
         dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
-        if (dev == PCI_DEV_INVALID) {
+        if (dev == PCI_DEV_INVALID)
                 die("Missing ich5?");
-        }
         pci_write_config32(dev, 0xe8, 0x00000000);
         pci_write_config8(dev, 0xf0, 0x00);
 
 #if 0
        display_cpuid_update_microcode();
-#endif
-#if 0
        print_pci_devices();
 #endif
 #if 1
@@ -102,9 +96,8 @@ static void main(unsigned long bist)
 #if 0
 //     dump_spd_registers(&cpu[0]);
        int i;
-       for(i = 0; i < 1; i++) {
+       for(i = 0; i < 1; i++)
                dump_spd_registers();
-       }
 #endif
        disable_watchdogs();
 //     dump_ipmi_registers();
@@ -130,11 +123,4 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
-
-#if 0
-       while(1) {
-               hlt();
-       }
-#endif
 }
-