Get mptable OEM/product ID from kconfig variables.

[coreboot.git] / src / mainboard / supermicro / x6dhe_g2 / mptable.c

diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
index c961d375fa90ef7f1f9a3d24d2ded27bd3c6ea68..4ea62cec71ca8977fd92fe1e24e05363071fcbb2 100644 (file)
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ b/src/mainboard/supermicro/x6dhe_g2/mptable.c
@@ -1,38 +1,22 @@
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
 
 static void *smp_write_config_table(void *v)
 {
-       static const char sig[4] = "PCMP";
-       static const char oem[8] = "COREBOOT";
-       static const char productid[12] = "X6DHE       ";
        struct mp_config_table *mc;
-       unsigned char bus_num;
-       unsigned char bus_isa;
+       int bus_isa;
        unsigned char bus_pxhd_1;
        unsigned char bus_pxhd_2;
        unsigned char bus_esb6300_1;
        unsigned char bus_esb6300_2;
 
        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-       memset(mc, 0, sizeof(*mc));
-
-       memcpy(mc->mpc_signature, sig, sizeof(sig));
-       mc->mpc_length = sizeof(*mc); /* initially just the header */
-       mc->mpc_spec = 0x04;
-       mc->mpc_checksum = 0; /* not yet computed */
-       memcpy(mc->mpc_oem, oem, sizeof(oem));
-       memcpy(mc->mpc_productid, productid, sizeof(productid));
-       mc->mpc_oemptr = 0;
-       mc->mpc_oemsize = 0;
-       mc->mpc_entry_count = 0; /* No entries yet... */
-       mc->mpc_lapic = LAPIC_ADDR;
-       mc->mpe_length = 0;
-       mc->mpe_checksum = 0;
-       mc->reserved = 0;
+
+       mptable_init(mc, LAPIC_ADDR);
 
        smp_write_processors(mc);
 
@@ -51,12 +35,9 @@ static void *smp_write_config_table(void *v)
                dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
                if (dev) {
                        bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-                       bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
-                       bus_isa++;
                } else {
                        printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
                        bus_esb6300_2 = 7;
-                       bus_isa = 8;
                }
                /* pxhd-1 */
                dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
@@ -76,16 +57,12 @@ static void *smp_write_config_table(void *v)
                }
        }
 
-       /* define bus and isa numbers */
-       for(bus_num = 0; bus_num < bus_isa; bus_num++) {
-               smp_write_bus(mc, bus_num, "PCI   ");
-       }
-       smp_write_bus(mc, bus_isa, "ISA   ");
+       mptable_write_buses(mc, NULL, &bus_isa);
 
        /* IOAPIC handling */
 
-       smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
-       smp_write_ioapic(mc, 3, 0x20, 0xfec10000);
+       smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+       smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
        {
                struct resource *res;
                device_t dev;