Add CONFIG_GENERATE_* for tables so that the user can select which tables not

[coreboot.git] / src / mainboard / supermicro / x6dai_g / Config.lb

diff --git a/src/mainboard/supermicro/x6dai_g/Config.lb b/src/mainboard/supermicro/x6dai_g/Config.lb
index 8d4ada557b362be9d85f2cb067fd42e96b85ad33..2756977d8ec90450f4d9feabc2516cc516779f4c 100644 (file)
--- a/src/mainboard/supermicro/x6dai_g/Config.lb
+++ b/src/mainboard/supermicro/x6dai_g/Config.lb
@@ -1,41 +1,11 @@
 ##
 ## Only use the option table in a normal image
 ##
-default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
 
-##
-## Compute the location and size of where this firmware image
-## (linuxBIOS plus bootloader) will live in the boot rom chip.
-##
-if USE_FALLBACK_IMAGE
-       default ROM_SECTION_SIZE   = FALLBACK_SIZE
-       default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
-else
-       default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
-       default ROM_SECTION_OFFSET = 0
-end
-
-##
-## Compute the start location and size size of
-## The linuxBIOS bootloader.
-##
-default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
-default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-
-##
-## Compute where this copy of linuxBIOS will start in the boot rom
-##
-default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
-
-##
-## Compute a range of ROM that can be cached to speed up linuxBIOS,
-## execution speed.
-##
-## XIP_ROM_SIZE must be a power of 2.
-## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
-##
-default XIP_ROM_SIZE=131072
-default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
+include /config/nofailovercalculation.lb
 
 ##
 ## Set all of the defaults for an x86 architecture
@@ -48,34 +18,34 @@ arch i386 end
 ##
 
 driver mainboard.o
-if HAVE_MP_TABLE object mptable.o end
-if HAVE_PIRQ_TABLE object irq_tables.o end
+if CONFIG_GENERATE_MP_TABLE object mptable.o end
+if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
 object reset.o
 
 ##
 ## Romcc output
 ##
 makerule ./failover.E
-       depends "$(MAINBOARD)/failover.c ./romcc" 
-       action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+       depends "$(CONFIG_MAINBOARD)/failover.c ../romcc" 
+       action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/failover.c -o $@"
 end
 
 makerule ./failover.inc
-       depends "$(MAINBOARD)/failover.c ./romcc"
-       action "./romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+       depends "$(CONFIG_MAINBOARD)/failover.c ../romcc"
+       action "../romcc    -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/failover.c -o $@"
 end
 
 makerule ./auto.E 
-       depends "$(MAINBOARD)/auto.c option_table.h ./romcc" 
-       action  "./romcc -E -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+       depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc" 
+       action  "../romcc -E -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
 end
 makerule ./auto.inc 
-       depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
-       action  "./romcc    -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+       depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
+       action  "../romcc    -mcpu=p4 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
 end
 
 ##
-## Build our 16 bit and 32 bit linuxBIOS entry code
+## Build our 16 bit and 32 bit coreboot entry code
 ##
 mainboardinit cpu/x86/16bit/entry16.inc
 mainboardinit cpu/x86/32bit/entry32.inc
@@ -83,9 +53,9 @@ ldscript /cpu/x86/16bit/entry16.lds
 ldscript /cpu/x86/32bit/entry32.lds
 
 ##
-## Build our reset vector (This is where linuxBIOS is entered)
+## Build our reset vector (This is where coreboot is entered)
 ##
-if USE_FALLBACK_IMAGE 
+if CONFIG_USE_FALLBACK_IMAGE 
        mainboardinit cpu/x86/16bit/reset16.inc
        ldscript /cpu/x86/16bit/reset16.lds
 else
@@ -103,11 +73,11 @@ mainboardinit arch/i386/lib/id.inc
 ldscript /arch/i386/lib/id.lds
 
 ###
-### This is the early phase of linuxBIOS startup 
+### This is the early phase of coreboot startup 
 ### Things are delicate and we test to see if we should
 ### failover to another image.
 ###
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
        ldscript /arch/i386/lib/failover.lds 
        mainboardinit ./failover.inc
 end
@@ -132,7 +102,7 @@ mainboardinit cpu/x86/mmx/disable_mmx.inc
 dir /pc80
 config chip.h
 
-chip northbridge/intel/E7525 # mch
+chip northbridge/intel/e7525 # mch
        device pci_domain 0 on
                chip southbridge/intel/esb6300  # esb6300 
                        register "pirq_a_d" = "0x0b0a0a05"
@@ -187,10 +157,10 @@ chip northbridge/intel/E7525 # mch
                device pci 08.0 on end
        end
        device apic_cluster 0 on
-               chip cpu/intel/socket_mPGA604_800Mhz # cpu0
+               chip cpu/intel/socket_mPGA604 # cpu0
                        device apic 0 on end
                end
-               chip cpu/intel/socket_mPGA604_800Mhz # cpu1
+               chip cpu/intel/socket_mPGA604 # cpu1
                        device apic 6 on end
                end
        end