Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c

[coreboot.git] / src / mainboard / supermicro / h8qme_fam10 / romstage.c

diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index ff33819f32f5fae853a07f9932fcf85cbaf2c455..ee858a89cde1c72abe2cc4568af7d08cef31d8a4 100644 (file)
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -19,12 +19,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 
-#define QRANK_DIMM_SUPPORT 1
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
@@ -41,11 +38,9 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
 
 #include <console/console.h>
-#include "lib/ramtest.c"
+#include <lib.h>
 
 #include <cpu/amd/model_10xxx_rev.h>
 
@@ -86,20 +81,14 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 }
 
 #include "northbridge/amd/amdfam10/amdfam10.h"
-#include "northbridge/amd/amdht/ht_wrapper.c"
 
 #include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
-#include "northbridge/amd/amdfam10/raminit_amdmct.c"
 #include "northbridge/amd/amdfam10/amdfam10_pci.c"
 
 #include "resourcemap.c"
 
 #include "cpu/amd/quadcore/quadcore.c"
 
-#define MCP55_NUM 1
-#define MCP55_USE_NIC 0
-#define MCP55_USE_AZA 0
-
 #define MCP55_PCI_E_X_0 4
 
 #include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
@@ -113,7 +102,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/model_10xxx/update_microcode.c"
 #include "cpu/amd/model_10xxx/init_cpus.c"
 
-#include "cpu/amd/model_10xxx/fidvid.c"
 
 #include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
 #include "northbridge/amd/amdfam10/early_ht.c"