nvidia/mcp55: Move HAVE_HARD_RESET to southbridge

[coreboot.git] / src / mainboard / supermicro / h8dmr / Kconfig

diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig
index 4cb20f4c60a6c793d76120031e0243d831d79a47..106992a3082f6b767d00007ac766bf7b0489af99 100644 (file)
--- a/src/mainboard/supermicro/h8dmr/Kconfig
+++ b/src/mainboard/supermicro/h8dmr/Kconfig
@@ -1,104 +1,82 @@
-config BOARD_SUPERMICRO_H8DMR
-       bool "H8DMR"
+if BOARD_SUPERMICRO_H8DMR
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
-       select CPU_AMD_K8
        select CPU_AMD_SOCKET_F
+       select DIMM_DDR2
+       select DIMM_REGISTERED
        select NORTHBRIDGE_AMD_AMDK8
        select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
        select SOUTHBRIDGE_NVIDIA_MCP55
+       select MCP55_USE_NIC
+       select MCP55_USE_AZA
        select SUPERIO_WINBOND_W83627HF
+       select HAVE_OPTION_TABLE
+       select HAVE_BUS_CONFIG
        select HAVE_PIRQ_TABLE
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
-       select HAVE_HARD_RESET
-       select IOAPIC
+       select HAVE_MP_TABLE
+       select LIFT_BSP_APIC_ID
+       select BOARD_ROMSIZE_KB_1024
+       select RAMINIT_SYSINFO
+       select QRANK_DIMM_SUPPORT
+       select K8_ALLOCATE_IO_RANGE
+       select SET_FIDVID
 
 config MAINBOARD_DIR
        string
        default supermicro/h8dmr
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config DCACHE_RAM_SIZE
        hex
        default 0x08000
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
        default 0x01000
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config APIC_ID_OFFSET
        hex
        default 0x10
-       depends on BOARD_SUPERMICRO_H8DMR
 
-config SB_HT_CHAIN_ON_BUS0
+config MEM_TRAIN_SEQ
        int
-       default 2
-       depends on BOARD_SUPERMICRO_H8DMR
-
-config SB_HT_CHAIN_UNITID_OFFSET_ONLY
-       bool
-       default n
-       depends on BOARD_SUPERMICRO_H8DMR
+       default 1
 
-config LB_CKS_RANGE_END
-       int
-       default 122
-       depends on BOARD_SUPERMICRO_H8DMR
-
-config LB_CKS_LOC
+config SB_HT_CHAIN_ON_BUS0
        int
-       default 123
-       depends on BOARD_SUPERMICRO_H8DMR
+       default 2
 
 config MAINBOARD_PART_NUMBER
        string
-       default "H8DMR"
-       depends on BOARD_SUPERMICRO_H8DMR
-
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-       depends on BOARD_SUPERMICRO_H8DMR
+       default "H8DMR-i2"
 
 config MAX_CPUS
        int
        default 4
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config MAX_PHYSICAL_CPUS
        int
        default 2
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config HT_CHAIN_END_UNITID_BASE
        hex
-       default 0x0
-       depends on BOARD_SUPERMICRO_H8DMR
+       default 0x20
 
 config HT_CHAIN_UNITID_BASE
        hex
        default 0x0
-       depends on BOARD_SUPERMICRO_H8DMR
-
-config USE_INIT
-       bool
-       default n
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_SUPERMICRO_H8DMR
 
 config IRQ_SLOT_COUNT
        int
        default 11
-       depends on BOARD_SUPERMICRO_H8DMR
+
+endif # BOARD_SUPERMICRO_H8DMR