Compile cbmem.c instead of including it in romstage,

[coreboot.git] / src / mainboard / roda / rk886ex / romstage.c

diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 4942788420b025bf4fdf377f578ffd2414bde792..80afe80745a1d3fcea0d0d1561ba3b466ead0be5 100644 (file)
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -29,18 +29,14 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
-
 #include <pc80/mc146818rtc.h>
-
 #include <console/console.h>
+#include <usbdebug.h>
 #include <cpu/x86/bist.h>
-
 #include "northbridge/intel/i945/i945.h"
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
-void enable_smbus(void);
-
 void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");
@@ -239,22 +235,13 @@ static void init_artec_dongle(void)
 
 #include <cbmem.h>
 
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
 void main(unsigned long bist)
 {
        u32 reg32;
        int boot_mode = 0;
 
-       if (bist == 0) {
+       if (bist == 0)
                enable_lapic();
-       }
 
        /* Force PCIRST# */
        pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
@@ -373,4 +360,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-