Simplify a few code chunks, fix whitespace and indentation.
[coreboot.git] / src / mainboard / roda / rk886ex / romstage.c
index 98ebadbc22bcc80ac6d34602de5f4ca5782c684d..109d2e81020666b5d65f28dbc5b93b6a8a04c8db 100644 (file)
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-
+#include <lib.h>
 #include <pc80/mc146818rtc.h>
-
 #include <console/console.h>
+#include <usbdebug.h>
 #include <cpu/x86/bist.h>
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
+#include "southbridge/intel/i82801gx/i82801gx.h"
 
-#if CONFIG_USBDEBUG
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
-
-#include "northbridge/intel/i945/udelay.c"
+void enable_smbus(void);
 
-#include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");
        /* General Registers */
@@ -61,18 +55,6 @@ static void setup_ich7_gpios(void)
        outl(0x00010030, DEFAULT_GPIOBASE + 0x38);      /* GP_LVL */
 }
 
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-       return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
 static void ich7_enable_lpc(void)
 {
        // Enable Serial IRQ
@@ -268,9 +250,8 @@ void main(unsigned long bist)
        u32 reg32;
        int boot_mode = 0;
 
-       if (bist == 0) {
+       if (bist == 0)
                enable_lapic();
-       }
 
        /* Force PCIRST# */
        pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
@@ -389,4 +370,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-