Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / rca / rm4100 / Kconfig
index fd54e995569088ecbd5d0201812b67220d918ad0..e2879fe9ae007815fc29c17bb049c6bb00d100bb 100644 (file)
@@ -1,34 +1,39 @@
-config BOARD_RCA_RM4100
-       bool "RM4100"
+if BOARD_RCA_RM4100
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
-       select CPU_INTEL_SOCKET_PGA370
+       select CPU_INTEL_SOCKET_MFCBGA479
        select NORTHBRIDGE_INTEL_I82830
        select SOUTHBRIDGE_INTEL_I82801DX
        select SUPERIO_SMSC_SMSCSUPERIO
-       select ROMCC
        select HAVE_PIRQ_TABLE
        select UDELAY_TSC
-       select BOARD_ROMSIZE_KB_512
+       select BOARD_ROMSIZE_KB_1024
        select HAVE_HARD_RESET
+       select HAVE_MAINBOARD_RESOURCES
        select HAVE_SMI_HANDLER
+       select GFXUMA
+       select TINY_BOOTBLOCK
 
 config MAINBOARD_DIR
        string
        default rca/rm4100
-       depends on BOARD_RCA_RM4100
 
 config MAINBOARD_PART_NUMBER
        string
        default "RM4100"
-       depends on BOARD_RCA_RM4100
 
-config HAVE_OPTION_TABLE
-       bool
-       default n
-       depends on BOARD_RCA_RM4100
+config DCACHE_RAM_BASE
+       hex
+       default 0xffdf8000
+
+config DCACHE_RAM_SIZE
+       hex
+       default 0x8000
 
 config IRQ_SLOT_COUNT
        int
        default 7
-       depends on BOARD_RCA_RM4100
 
+endif # BOARD_RCA_RM4100