Simplify a few code chunks, fix whitespace and indentation.
[coreboot.git] / src / mainboard / pcengines / alix1c / romstage.c
index f0c4ed63254bc984bcd46b40f8cc79cf7b130078..209485ec64085e4f719c219276133594420c6e40 100644 (file)
@@ -36,9 +36,7 @@
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
 /* The ALIX1.C has no SMBus; the setup is hard-wired. */
-static void cs5536_enable_smbus(void)
-{
-}
+static void cs5536_enable_smbus(void) { }
 
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
@@ -88,7 +86,7 @@ static u8 spd_read_byte(u8 device, u8 address)
        print_debug("spd_read_byte dev ");
        print_debug_hex8(device);
 
-       if (device != (0x50 << 1)) {
+       if (device != DIMM0) {
                print_debug(" returns 0xff\n");
                return 0xff;
        }
@@ -106,9 +104,6 @@ static u8 spd_read_byte(u8 device, u8 address)
 #define PLLMSRhi       0x00001490      /* Manual settings for the PLL */
 #define PLLMSRlo       0x02000030
 
-#define DIMM0          0xa0
-#define DIMM1          0xa2
-
 #include "northbridge/amd/lx/raminit.h"
 #include "northbridge/amd/lx/pll_reset.c"
 #include "northbridge/amd/lx/raminit.c"
@@ -117,15 +112,10 @@ static u8 spd_read_byte(u8 device, u8 address)
 #include "cpu/amd/model_lx/syspreinit.c"
 #include "cpu/amd/model_lx/msrinit.c"
 
-/** Early mainboard specific GPIO setup. */
-static void mb_gpio_init(void)
-{
-}
-
 void main(unsigned long bist)
 {
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {0x50}},
+               {.channel0 = {DIMM0}},
        };
 
        post_code(0x01);
@@ -140,7 +130,6 @@ void main(unsigned long bist)
         */
        cs5536_disable_internal_uart();
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-       mb_gpio_init();
        uart_init();
        console_init();
 
@@ -190,4 +179,3 @@ void main(unsigned long bist)
        void done_cache_as_ram_main(void);
        done_cache_as_ram_main();
 }
-