printk_foo -> printk(BIOS_FOO, ...)
[coreboot.git] / src / mainboard / newisys / khepri / mptable.c
index ba8692c1f5b29083b467f110da3b7b3967a5344d..03ee960d439cb57ac367a5929b4a9bac46636cb1 100644 (file)
@@ -4,7 +4,7 @@
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v, unsigned long * processor_map)
+void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
        static const char oem[8] = "NEWISYS ";
@@ -33,45 +33,45 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
        mc->mpe_checksum = 0;
        mc->reserved = 0;
 
-       smp_write_processors(mc, processor_map);
+       smp_write_processors(mc);
 
        {
-               struct pci_dev *dev;
-               uint32_t base;
+               device_t dev;
+
                /* 8111 */
-               dev = dev_find_slot(0, PCI_DEVFN(0x03,0));
+               dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
                if (dev) {
                        bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
                        bus_isa    = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
                        bus_isa++;
                }
                else {
-                       printk_debug("ERROR - could not find PCI 0:03.0, using defaults\n");
+                       printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
 
-                       bus_8111_1 = 3;
-                       bus_isa = 4;
+                       bus_8111_1 = 4;
+                       bus_isa = 5;
                }
                /* 8131-1 */
-               dev = dev_find_slot(0, PCI_DEVFN(0x01,0));
+               dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
                if (dev) {
                        bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 
                }
                else {
-                       printk_debug("ERROR - could not find PCI 0:01.0, using defaults\n");
+                       printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
 
-                       bus_8131_1 = 1;
+                       bus_8131_1 = 2;
                }
                /* 8131-2 */
-               dev = dev_find_slot(0, PCI_DEVFN(0x02,0));
+               dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
                if (dev) {
                        bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
 
                }
                else {
-                       printk_debug("ERROR - could not find PCI 0:02.0, using defaults\n");
+                       printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
 
-                       bus_8131_2 = 2;
+                       bus_8131_2 = 3;
                }
        }
 
@@ -85,21 +85,23 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 
        smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
        {
-               struct pci_dev *dev;
-               uint32_t base;
+               device_t dev;
+               struct resource *res;
                /* 8131 apic 3 */
-               dev = dev_find_slot(0, PCI_DEVFN(0x01,1));
+               dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
                if (dev) {
-                       base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
-                       base &= PCI_BASE_ADDRESS_MEM_MASK;
-                       smp_write_ioapic(mc, 0x03, 0x11, base);
+                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
+                       if (res) {
+                               smp_write_ioapic(mc, 0x03, 0x11, res->base);
+                       }
                }
                /* 8131 apic 4 */
-               dev = dev_find_slot(0, PCI_DEVFN(0x02,1));
+               dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
                if (dev) {
-                       base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
-                       base &= PCI_BASE_ADDRESS_MEM_MASK;
-                       smp_write_ioapic(mc, 0x04, 0x11, base);
+                       res = find_resource(dev, PCI_BASE_ADDRESS_0);
+                       if (res) {
+                               smp_write_ioapic(mc, 0x04, 0x11, res->base);
+                       }
                }
        }
 
@@ -144,10 +146,6 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
                bus_isa, 0x00, MP_APIC_ALL, 0x01);
 
 
-       /* AGP Slot */
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               0x03, (6<<2)|0, 0x02, 0x12);
-
        /* PCI Slot 1 */
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
                bus_8131_2, (1<<2)|0, 0x02, 0x11);
@@ -220,17 +218,16 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
-
        mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-       printk_debug("Wrote the mp table end at: %p - %p\n",
+       printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
                mc, smp_next_mpe_entry(mc));
        return smp_next_mpe_entry(mc);
 }
 
-unsigned long write_smp_table(unsigned long addr, unsigned long *processor_map)
+unsigned long write_smp_table(unsigned long addr)
 {
        void *v;
        v = smp_write_floating_table(addr);
-       return (unsigned long)smp_write_config_table(v, processor_map);
+       return (unsigned long)smp_write_config_table(v);
 }