Remove old AMD fam10 fixme comment

[coreboot.git] / src / mainboard / msi / ms9652_fam10 / romstage.c

diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 9567d2c7f316d9c07b3a4693d916e1ae724dfd04..0bf6d114be9d7964a5e4528b9fbb6976b5a9cafd 100644 (file)
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -31,7 +31,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
-#include <usbdebug.h>
 #include <lib.h>
 #include <spd.h>
 #include <cpu/amd/model_10xxx_rev.h>
@@ -136,18 +135,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        pnp_exit_ext_func_mode(SERIAL_DEV);
 
        w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-       uart_init();
        console_init();
-       printk(BIOS_DEBUG, "\n");
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
-#if CONFIG_USBDEBUG
-       mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
-       early_usbdebug_init();
-#endif
-
        val = cpuid_eax(1);
        printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
@@ -249,7 +241,40 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        raminit_amdmct(sysinfo);
        post_code(0x41);
 
-       printk(BIOS_DEBUG, "\n*** Yes, the copy/decompress is taking a while, FIXME!\n");
        post_cache_as_ram();    // BSP switch stack to ram, copy then execute LB.
        post_code(0x43);        // Should never see this post code.
 }
+
+/**
+ * BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, u8 **List)
+ * Description:
+ *     This routine is called every time a non-coherent chain is processed.
+ *     BUID assignment may be controlled explicitly on a non-coherent chain. Provide a
+ *     swap list. The first part of the list controls the BUID assignment and the
+ *     second part of the list provides the device to device linking.  Device orientation
+ *     can be detected automatically, or explicitly.  See documentation for more details.
+ *
+ *     Automatic non-coherent init assigns BUIDs starting at 1 and incrementing sequentially
+ *     based on each device's unit count.
+ *
+ * Parameters:
+ *     @param[in]  u8  node    = The node on which this chain is located
+ *     @param[in]  u8  link    = The link on the host for this chain
+ *     @param[out] u8** list   = supply a pointer to a list
+ *     @param[out] BOOL result = true to use a manual list
+ *                               false to initialize the link automatically
+ */
+BOOL AMD_CB_ManualBUIDSwapList (u8 node, u8 link, const u8 **List)
+{
+       static const u8 swaplist[] = { 0xFF, CONFIG_HT_CHAIN_UNITID_BASE, CONFIG_HT_CHAIN_END_UNITID_BASE, 0xFF };
+       /* If the BUID was adjusted in early_ht we need to do the manual override */
+       if ((CONFIG_HT_CHAIN_UNITID_BASE != 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE != 0)) {
+               printk(BIOS_DEBUG, "AMD_CB_ManualBUIDSwapList()\n");
+               if ((node == 0) && (link == 0)) {       /* BSP SB link */
+                       *List = swaplist;
+                       return 1;
+               }
+       }
+
+       return 0;
+}