Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / mainboard / msi / ms9185 / Kconfig

diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig
index 3bdd690581753380e7c35999b939560fb2fab315..5e2835300780f617ca2fdd101bf014f181619bbc 100644 (file)
--- a/src/mainboard/msi/ms9185/Kconfig
+++ b/src/mainboard/msi/ms9185/Kconfig
@@ -1,99 +1,82 @@
-config BOARD_MSI_MS9185
-       bool "MS-9185 (K9SD Master-S2R)"
+if BOARD_MSI_MS9185
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
        select CPU_AMD_SOCKET_F
+       select DIMM_DDR2
+       select DIMM_REGISTERED
        select NORTHBRIDGE_AMD_AMDK8
        select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
        select SOUTHBRIDGE_BROADCOM_BCM5780
        select SOUTHBRIDGE_BROADCOM_BCM5785
        select SUPERIO_NSC_PC87417
        select HAVE_BUS_CONFIG
+       select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
        select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select BOARD_ROMSIZE_KB_512
+       select RAMINIT_SYSINFO
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+       select QRANK_DIMM_SUPPORT
+       select SET_FIDVID
 
 config MAINBOARD_DIR
        string
        default msi/ms9185
-       depends on BOARD_MSI_MS9185
 
 config DCACHE_RAM_BASE
        hex
        default 0xcc000
-       depends on BOARD_MSI_MS9185
 
 config DCACHE_RAM_SIZE
        hex
        default 0x04000
-       depends on BOARD_MSI_MS9185
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
        default 0x01000
-       depends on BOARD_MSI_MS9185
 
 config APIC_ID_OFFSET
        hex
        default 0x8
-       depends on BOARD_MSI_MS9185
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_MSI_MS9185
 
 config MAINBOARD_PART_NUMBER
        string
        default "MS-9185"
-       depends on BOARD_MSI_MS9185
-
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-       depends on BOARD_MSI_MS9185
 
 config MAX_CPUS
        int
        default 4
-       depends on BOARD_MSI_MS9185
 
 config MAX_PHYSICAL_CPUS
        int
        default 2
-       depends on BOARD_MSI_MS9185
 
 config HT_CHAIN_END_UNITID_BASE
        hex
        default 0x1
-       depends on BOARD_MSI_MS9185
 
 config HT_CHAIN_UNITID_BASE
        hex
        default 0x6
-       depends on BOARD_MSI_MS9185
-
-config USE_INIT
-       bool
-       default n
-       depends on BOARD_MSI_MS9185
 
 config IRQ_SLOT_COUNT
        int
        default 11
-       depends on BOARD_MSI_MS9185
 
 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
        hex
        default 0x1022
-       depends on BOARD_MSI_MS9185
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
        hex
        default 0x2b80
-       depends on BOARD_MSI_MS9185
 
+endif # BOARD_MSI_MS9185