Drop excessive whitespace randomly sprinkled in romstage.c files.

[coreboot.git] / src / mainboard / lippert / spacerunner-lx / romstage.c

diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
index b9b0e4f048119faf3e979093df50cded41066664..ffd9e4ed06b757bb5b6acb01c99e86ed6b9a99f3 100644 (file)
--- a/src/mainboard/lippert/spacerunner-lx/romstage.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -29,25 +29,25 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
 #include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
-
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 
 /* Bit0 enables Spread Spectrum, bit1 makes on-board SSD act as IDE slave. */
-#define SMC_CONFIG 0x01
+#if CONFIG_ONBOARD_IDE_SLAVE
+       #define SMC_CONFIG      0x03
+#else
+       #define SMC_CONFIG      0x01
+#endif
 
 #define ManualConf 1           /* No automatic strapped PLL config */
 #define PLLMSRhi 0x0000059C    /* Manual settings for the PLL */
 #define PLLMSRlo 0x00DE6001
-#define DIMM0 0xA0
-#define DIMM1 0xA2
 
 static const unsigned char spdbytes[] = {      // 4x Promos V58C2512164SA-J5I
        0xFF, 0xFF,                             // only values used by Geode-LX raminit.c are set
@@ -125,16 +125,15 @@ static int smc_send_config(unsigned char config_data)
 
 static const u16 sio_init_table[] = { // hi=data, lo=index
        0x0707,         // select LDN 7 (GPIO, SPI, watchdog, ...)
-       0x1E2C,         // disable ATXPowerGood
-       0x0423,         // don't delay POWerOK1/2
-       0x9072,         // watchdog triggers POWOK, counts seconds
+       0x072C,         // VIN6 enabled, FAN4/5 disabled, VIN7,VIN3 internal
+       0x1423,         // don't delay PoWeROK1/2
+       0x9072,         // watchdog triggers PWROK, counts seconds
 #if !CONFIG_USE_WATCHDOG_ON_BOOT
-       0x0073, 0x0074, // disable watchdog by setting timeout to 0
+       0x0073, 0x0074, // disarm watchdog by changing 56 s timeout to 0
 #endif
        0xBF25, 0x172A, 0xF326, // select GPIO function for most pins
        0xFF27, 0xDF28, 0x2729, // (GP45=SUSB, GP23,22,16,15=SPI, GP13=PWROK1)
-       0x072C,         // VIN6=enabled?, FAN4/5 disabled, VIN7=internal, VIN3=internal
-       0x66B8, 0x0CB9, // enable pullups
+       0x66B8, 0x0CB9, // enable pullups on SPI, RS485_EN
        0x07C0,         // enable Simple-I/O for GP12-10= RS485_EN2,1, LIVE_LED
        0x07C8,         // config GP12-10 as output
        0x2DF5,         // map Hw Monitor Thermal Output to GP55
@@ -162,7 +161,7 @@ void main(unsigned long bist)
        post_code(0x01);
 
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}
+               {.channel0 = {DIMM0, DIMM1}}
        };
 
        SystemPreInit();
@@ -184,7 +183,7 @@ void main(unsigned long bist)
 
        pll_reset(ManualConf);
 
-       cpuRegInit();
+       cpuRegInit(0, DIMM0, DIMM1, DRAM_TERMINATED);
 
        /* bit1 = on-board IDE is slave, bit0 = Spread Spectrum */
        if ((err = smc_send_config(SMC_CONFIG))) {
@@ -201,4 +200,3 @@ void main(unsigned long bist)
        /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
        return;
 }
-