Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / lippert / frontrunner / romstage.c

diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c
index c5ed73aec65720190b232516a2e658819246626f..87337a2be9bb540b6ea5dc774a12edc99612ddb9 100644 (file)
--- a/src/mainboard/lippert/frontrunner/romstage.c
+++ b/src/mainboard/lippert/frontrunner/romstage.c
@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/bist.h"
@@ -19,12 +19,12 @@
 #include "northbridge/amd/gx2/raminit.h"
 
 /* this has to be done on a per-mainboard basis, esp. if you don't have smbus */
-static void sdram_set_spd_registers(const struct mem_controller *ctrl) 
+static void sdram_set_spd_registers(const struct mem_controller *ctrl)
 {
        msr_t msr;
        /* 1. Initialize GLMC registers base on SPD values,
         * Hard coded as XpressROM for now */
-       //print_debug("sdram_enable step 1\r\n");
+       //print_debug("sdram_enable step 1\n");
        msr = rdmsr(0x20000018);
        msr.hi = 0x10076013;
        msr.lo = 0x3400;