X60/T60: enable AHCI mode
[coreboot.git] / src / mainboard / lenovo / x60 / devicetree.cb
index 01a42eb8160e0295c7467d79c9a8869387d92ec6..2f0a1792deffe324a16cb46f9ba6d8eb2fd33448 100644 (file)
@@ -53,13 +53,16 @@ chip northbridge/intel/i945
                        #  1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
                        #  2 SCI (if corresponding GPIO_EN bit is also set)
                        register "gpi13_routing" = "2"
-                       register "gpi12_routing" = "2"
+                       register "gpi12_routing" = "1"
                        register "gpi8_routing" = "2"
 
-                       register "sata_ahci" = "0x0"
+                       register "sata_ahci" = "0x1"
+                       register "sata_ports_implemented" = "0x01"
 
                        register "gpe0_en" = "0x11000006"
+                       register "alt_gp_smi_en" = "0x1000"
 
+                       register "c4onc3_enable" = "1"
                        device pci 1b.0 on # Audio Cnotroller
                                subsystemid 0x17aa 0x2010
                        end
@@ -86,6 +89,7 @@ chip northbridge/intel/i945
                                        device pnp ff.1 on # dummy
                                        end
                                        register "backlight_enable" = "0x01"
+                                       register "dock_event_enable" = "0x01"
                                end
                                chip ec/lenovo/h8
                                        device pnp ff.2 on # dummy
@@ -98,7 +102,7 @@ chip northbridge/intel/i945
                                        register "config0" = "0xa6"
                                        register "config1" = "0x05"
                                        register "config2" = "0xa0"
-                                       register "config3" = "0x05"
+                                       register "config3" = "0x01"
 
                                        register "beepmask0" = "0xfe"
                                        register "beepmask1" = "0x96"
@@ -107,6 +111,15 @@ chip northbridge/intel/i945
                                        register "event3_enable" = "0xff"
                                        register "event4_enable" = "0xf4"
                                        register "event5_enable" = "0x3c"
+                                       register "event6_enable" = "0x80"
+                                       register "event7_enable" = "0x01"
+                                       register "eventc_enable" = "0x3c"
+                                       register "event8_enable" = "0x01"
+                                       register "event9_enable" = "0xff"
+                                       register "eventa_enable" = "0xff"
+                                       register "eventb_enable" = "0xff"
+                                       register "eventc_enable" = "0xff"
+                                       register "eventd_enable" = "0xff"
 
                                        register "wlan_enable" = "0x01"
                                        register "trackpoint_enable" = "0x03"
@@ -164,6 +177,22 @@ chip northbridge/intel/i945
                        end
                        device pci 1f.3 on # SMBUS
                                subsystemid 0x17aa 0x200f
+                               chip drivers/ics/954309
+                                       register "reg0" = "0x2e"
+                                       register "reg1" = "0xf7"
+                                       register "reg2" = "0x3c"
+                                       register "reg3" = "0x20"
+                                       register "reg4" = "0x01"
+                                       register "reg5" = "0x00"
+                                       register "reg6" = "0x1b"
+                                       register "reg7" = "0x01"
+                                       register "reg8" = "0x54"
+                                       register "reg9" = "0xff"
+                                       register "reg10" = "0xff"
+                                       register "reg11" = "0x07"
+                                       device i2c 69 on end
+                               end
+
                        end
                end
                chip southbridge/ricoh/rl5c476