Simplify a few code chunks, fix whitespace and indentation.
[coreboot.git] / src / mainboard / lanner / em8510 / romstage.c
index 9a33fa881220064a4f62a901448dfb1f851ed89b..d3e288a661f8e2d9e363b2622d3fcca79ed864c4 100644 (file)
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
+#include <spd.h>
 #include "pc80/udelay_io.c"
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "southbridge/intel/i82801dx/i82801dx.h"
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
 #include "northbridge/intel/i855/raminit.h"
 #include "northbridge/intel/i855/debug.c"
-#include "superio/winbond/w83627thf/w83627thf_early_serial.c"
+#include "superio/winbond/w83627thg/w83627thg_early_serial.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
-#define SERIAL_DEV PNP_DEV(0x2e, W83627THF_SP1)
+#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -55,7 +55,7 @@ void main(unsigned long bist)
        static const struct mem_controller memctrl[] = {
                {
                        .d0 = PCI_DEV(0, 0, 1),
-                       .channel0 = { (0xa<<3)|0, 0 },
+                       .channel0 = { DIMM0, 0 },
                },
        };
 
@@ -66,7 +66,7 @@ void main(unsigned long bist)
 #endif
        }
 
-        w83627thf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+        w83627thg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
@@ -77,15 +77,13 @@ void main(unsigned long bist)
        print_pci_devices();
 #endif
 
-       if(!bios_reset_detected()) {
+       if (!bios_reset_detected()) {
                enable_smbus();
 #if 1
                dump_spd_registers(&memctrl[0]);
                dump_smbus_registers();
 #endif
-
                sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
-
        }
 
 #if 0
@@ -100,4 +98,3 @@ void main(unsigned long bist)
        ram_check(0x80000000, 0x81000000);
 #endif
 }
-