Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / lanner / em8510 / Kconfig
index 97d294922dbcc7efd904b08ec7fbe665fe0faccf..136e181d04242097cfe126e444d2c8322db8062e 100644 (file)
@@ -1,38 +1,36 @@
-config BOARD_LANNER_EM8510
-       bool "EM-8510"
+if BOARD_LANNER_EM8510
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MPGA479M
        select NORTHBRIDGE_INTEL_I855
        select SOUTHBRIDGE_INTEL_I82801DX
-       select SUPERIO_WINBOND_W83627THF
+       select SUPERIO_WINBOND_W83627THG
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_HARD_RESET
        select BOARD_ROMSIZE_KB_512
-       select USE_DCACHE_RAM
        select TINY_BOOTBLOCK
 
 config MAINBOARD_DIR
        string
        default lanner/em8510
-       depends on BOARD_LANNER_EM8510
 
 config MAINBOARD_PART_NUMBER
        string
        default "EM-8510"
-       depends on BOARD_LANNER_EM8510
 
 config DCACHE_RAM_BASE
        hex
        default 0xffdf8000
-       depends on BOARD_LANNER_EM8510
 
 config DCACHE_RAM_SIZE
        hex
        default 0x8000
-       depends on BOARD_LANNER_EM8510
 
 config IRQ_SLOT_COUNT
        int
        default 10
-       depends on BOARD_LANNER_EM8510
+
+endif # BOARD_LANNER_EM8510