Drop excessive whitespace randomly sprinkled in romstage.c files.

[coreboot.git] / src / mainboard / jetway / j7f24 / romstage.c

diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c
index 0d8e9dad3b913a69154f51753f1a86dadb936c8d..6cfaaa4173e1b1d596bd3afee1c5443bbbb42803 100644 (file)
--- a/src/mainboard/jetway/j7f24/romstage.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -26,16 +26,15 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 #include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "superio/fintek/f71805f/f71805f_early_serial.c"
+#include <lib.h>
+#include <spd.h>
 
 #if CONFIG_TTYS0_BASE == 0x2f8
 #define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2)
@@ -83,7 +82,7 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 },
+       .channel0 = { DIMM0 },
 };
 
 void main(unsigned long bist)
@@ -100,11 +99,6 @@ void main(unsigned long bist)
        enable_smbus();
        smbus_fixup(&ctrl);
 
-       if (bist == 0) {
-               print_debug("doing early_mtrr\n");
-               early_mtrr_init();
-       }
-
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);
 
@@ -117,4 +111,3 @@ void main(unsigned long bist)
 
        print_spew("Leaving romstage.c:main()\n");
 }
-