Get mptable OEM/product ID from kconfig variables.

[coreboot.git] / src / mainboard / intel / xe7501devkit / mptable.c

diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index 9279b8485d5f553cc0081a8b0255140c8e3e1500..acd762194d2efeb74e74d94c384893dcdc37f902 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -15,19 +15,7 @@
 #define INT_D  3
 #define PCI_IRQ(dev, intLine)  (((dev)<<2) | intLine)
 
-static void xe7501devkit_register_buses(struct mp_config_table *mc)
-{
-       // Bus ID, Bus Type
-       smp_write_bus(mc, PCI_BUS_CHIPSET,      BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_E7501_HI_B,   BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_P64H2_2_B,    BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_P64H2_2_A,    BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_E7501_HI_D,   BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_P64H2_1_B,    BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_P64H2_1_A,    BUSTYPE_PCI);
-       smp_write_bus(mc, PCI_BUS_ICH3,         BUSTYPE_PCI);
-       smp_write_bus(mc, SUPERIO_BUS,          BUSTYPE_ISA);
-}
+static int bus_isa;
 
 static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
 {
@@ -42,14 +30,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
        // P64H2#2 Bus A IOAPIC
        dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
        if (!dev)
-               BUG();          // Config.lb error?
+               BUG();
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#2 Bus B IOAPIC
        dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
        if (!dev)
-               BUG();          // Config.lb error?
+               BUG();
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_B, P64H2_IOAPIC_VERSION, res->base);
 
@@ -57,14 +45,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
        // P64H2#1 Bus A IOAPIC
        dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
        if (!dev)
-               BUG();          // Config.lb error?
+               BUG();
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base);
 
        // P64H2#1 Bus B IOAPIC
        dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
        if (!dev)
-               BUG();          // Config.lb error?
+               BUG();
        res = find_resource(dev, PCI_BASE_ADDRESS_0);
        smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_B, P64H2_IOAPIC_VERSION, res->base);
 }
@@ -126,7 +114,7 @@ static void xe7501devkit_register_interrupts(struct mp_config_table *mc)
 
        // TODO: Not sure how to handle BT_INTR# signals from the P64H2s. Do we even need to, in APIC mode?
 
-       mptable_add_isa_interrupts(mc, SUPERIO_BUS, IOAPIC_ICH3, 0);
+       mptable_add_isa_interrupts(mc, bus_isa, IOAPIC_ICH3, 0);
 }
 
 static void *smp_write_config_table(void* v)
@@ -135,11 +123,11 @@ static void *smp_write_config_table(void* v)
 
        mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
 
-       mptable_init(mc, "XE7501DEVKIT", LAPIC_ADDR);
+       mptable_init(mc, LAPIC_ADDR);
 
        smp_write_processors(mc);
 
-       xe7501devkit_register_buses(mc);
+       mptable_write_buses(mc, NULL, &bus_isa);
        xe7501devkit_register_ioapics(mc);
        xe7501devkit_register_interrupts(mc);