intel/i82801cx: Move HAVE_HARD_RESET to southbridge

[coreboot.git] / src / mainboard / intel / xe7501devkit / Kconfig

diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig
index d4c6bf7eb4a7c326930b828e5941336cc850e0da..a743469cfade3f6d714f23efa96f08e434aa8d19 100644 (file)
--- a/src/mainboard/intel/xe7501devkit/Kconfig
+++ b/src/mainboard/intel/xe7501devkit/Kconfig
@@ -1,45 +1,39 @@
-config BOARD_INTEL_XE7501DEVKIT
-       bool "XE7501devkit"
+if BOARD_INTEL_XE7501DEVKIT
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
        select CPU_INTEL_SOCKET_MPGA604
        select NORTHBRIDGE_INTEL_E7501
        select SOUTHBRIDGE_INTEL_I82870
-       select SOUTHBRIDGE_INTEL_I82801CA
+       select SOUTHBRIDGE_INTEL_I82801CX
        select SUPERIO_SMSC_LPC47B272
+       select ROMCC
+       select BOARD_HAS_HARD_RESET
        select HAVE_PIRQ_TABLE
+       select HAVE_MP_TABLE
        select UDELAY_TSC
+       select HAVE_ACPI_TABLES
+       select BOARD_ROMSIZE_KB_2048
 
 config MAINBOARD_DIR
        string
        default intel/xe7501devkit
-       depends on BOARD_INTEL_XE7501DEVKIT
-
-config LB_CKS_RANGE_START
-       int
-       default 128
-       depends on BOARD_INTEL_XE7501DEVKIT
-
-config LB_CKS_RANGE_END
-       int
-       default 130
-       depends on BOARD_INTEL_XE7501DEVKIT
-
-config LB_CKS_LOC
-       int
-       default 131
-       depends on BOARD_INTEL_XE7501DEVKIT
 
 config MAINBOARD_PART_NUMBER
        string
-       default "EIDXE7501DEVKIT"
-       depends on BOARD_INTEL_XE7501DEVKIT
-
-config HAVE_OPTION_TABLE
-       bool
-       default y
-       depends on BOARD_INTEL_XE7501DEVKIT
+       default "XE7501devkit"
 
 config IRQ_SLOT_COUNT
        int
        default 12
-       depends on BOARD_INTEL_XE7501DEVKIT
+
+config MAX_CPUS
+       int
+       default 2
+
+config MAX_PHYSICAL_CPUS
+       int
+       default 2
+
+endif # BOARD_INTEL_XE7501DEVKIT