Factor out common mptable code to mptable_init().

[coreboot.git] / src / mainboard / intel / d945gclf / romstage.c

diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 0b5c9c9cdbe822ae61c818a3f614711c39ade4a2..237642b74726082942ad9e6a99f6d03dac65434f 100644 (file)
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -19,10 +19,6 @@
 
 // __PRE_RAM__ means: use "unsigned" for device, not a struct.
 
-/* Configuration of the i945 driver */
-#define CHIPSET_I945GC 1
-#define CHANNEL_XOR_RANDOMIZATION 1
-
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
@@ -30,29 +26,27 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
+#include <lib.h>
 
 #include "superio/smsc/lpc47m15x/lpc47m15x.h"
 
 #include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
+#include <usbdebug.h>
 #include <cpu/x86/bist.h>
 
-#if CONFIG_USBDEBUG
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
 #include "superio/smsc/lpc47m15x/lpc47m15x_early_serial.c"
 
-#include "northbridge/intel/i945/udelay.c"
-
 #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
 
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+
+void enable_smbus(void);
+
+void setup_ich7_gpios(void)
 {
        /* TODO: This is highly board specific and should be moved */
        printk(BIOS_DEBUG, " GPIOS...");
@@ -69,18 +63,6 @@ static void setup_ich7_gpios(void)
        outl(0x000300fd, DEFAULT_GPIOBASE + 0x38);      /* GP_LVL */
 }
 
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-       return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
 static void ich7_enable_lpc(void)
 {
        // Enable Serial IRQ
@@ -295,7 +277,7 @@ void main(unsigned long bist)
 
 #if !CONFIG_HAVE_ACPI_RESUME
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
-#if defined(DEBUG_RAM_SETUP)
+#if CONFIG_DEBUG_RAM_SETUP
        sdram_dump_mchbar_registers();
 #endif