mptable: Refactor mptable generation some more

[coreboot.git] / src / mainboard / intel / d945gclf / mptable.c

diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c
index 5930d2f43040d0f3c9f3b18d5f0986b2eb4ba9bf..ab537cb71822c92c0d99eb70fcc780b92425ff60 100644 (file)
--- a/src/mainboard/intel/d945gclf/mptable.c
+++ b/src/mainboard/intel/d945gclf/mptable.c
@@ -27,42 +27,16 @@
 
 static void *smp_write_config_table(void *v)
 {
-        static const char sig[4] = "PCMP";
-        static const char oem[8] = "COREBOOT";
-        static const char productid[12] = "D945GCLF    ";
         struct mp_config_table *mc;
-       int i;
-       int max_pci_bus, isa_bus;
+       int isa_bus;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-        memset(mc, 0, sizeof(*mc));
-
-        memcpy(mc->mpc_signature, sig, sizeof(sig));
-        mc->mpc_length = sizeof(*mc); /* initially just the header */
-        mc->mpc_spec = 0x04;
-        mc->mpc_checksum = 0; /* not yet computed */
-        memcpy(mc->mpc_oem, oem, sizeof(oem));
-        memcpy(mc->mpc_productid, productid, sizeof(productid));
-        mc->mpc_oemptr = 0;
-        mc->mpc_oemsize = 0;
-        mc->mpc_entry_count = 0; /* No entries yet... */
-        mc->mpc_lapic = LAPIC_ADDR;
-        mc->mpe_length = 0;
-        mc->mpe_checksum = 0;
-        mc->reserved = 0;
 
-        smp_write_processors(mc);
-
-       max_pci_bus = 5; // XXX read me from bridges.
-
-       /* ISA bus follows */
-       isa_bus = max_pci_bus + 1;
+       mptable_init(mc, LAPIC_ADDR);
 
-       /* Bus:         Bus ID  Type */
-       for (i=0; i <= max_pci_bus; i++)
-               smp_write_bus(mc, i, "PCI   ");
+        smp_write_processors(mc);
 
-       smp_write_bus(mc, isa_bus, "ISA   ");
+       mptable_write_buses(mc, NULL, &isa_bus);
 
        /* I/O APICs:   APIC ID Version State           Address */
        smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
@@ -102,21 +76,15 @@ static void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x0, 0x2, 0x10);
 
        /* Local Ints:  Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x0);
-       smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, isa_bus, 0x0, MP_APIC_ALL, 0x1);
+       mptable_lintsrc(mc, isa_bus);
 
        /* Compute the checksums */
-       mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
-       mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-
-       printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n", mc, smp_next_mpe_entry(mc));
-
-       return smp_next_mpe_entry(mc);
+       return mptable_finalize(mc);
 }
 
 unsigned long write_smp_table(unsigned long addr)
 {
        void *v;
-       v = smp_write_floating_table(addr);
+       v = smp_write_floating_table(addr, 0);
        return (unsigned long)smp_write_config_table(v);
 }