#define SYSTEM_TYPE 1 /* DESKTOP */
//#define SYSTEM_TYPE 2 /* MOBILE */
-#define RAMINIT_SYSINFO 1
-
-#define SET_NB_CFG_54 1
-
-//used by raminit
-#define QRANK_DIMM_SUPPORT 1
-
//used by incoherent_ht
#define FAM10_SCAN_PCI_BUS 0
#define FAM10_ALLOCATE_IO_RANGE 0
-//used by init_cpus and fidvid
-#define SET_FIDVID 1
-#define SET_FIDVID_CORE_RANGE 0
-
/* UART address and device number */
#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1)
#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
-#include "lib/ramtest.c"
#include <cpu/amd/model_10xxx_rev.h>
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
-
+#include <lib.h>
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdfam10/reset_test.c"
-
#include <console/loglevel.h>
#include "cpu/x86/bist.h"
-
static int smbus_read_byte(u32 device, u32 address);
-
#include "superio/fintek/f71859/f71859_early_serial.c"
-
-#if CONFIG_USBDEBUG
-#include "southbridge/amd/sb700/sb700_enable_usbdebug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
+#include <usbdebug.h>
#include "cpu/x86/mtrr/earlymtrr.c"
#include <cpu/amd/mtrr.h>
#include "northbridge/amd/amdfam10/setup_resource_map.c"
-
#include "southbridge/amd/rs780/rs780_early_setup.c"
#include "southbridge/amd/sb700/sb700_early_setup.c"
#include "northbridge/amd/amdfam10/debug.c"
}
#include "northbridge/amd/amdfam10/amdfam10.h"
-
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
#include "northbridge/amd/amdfam10/amdfam10_pci.c"
-
#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
-
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-
#include "northbridge/amd/amdfam10/early_ht.c"
#include "southbridge/amd/sb700/sb700_early_setup.c"
-
-//#include "spd_addr.h"
-
-#define RC00 0
-#define RC01 1
-
-#define DIMM0 0x50
-#define DIMM1 0x51
-#define DIMM2 0x52
-#define DIMM3 0x53
+#include <spd.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
uart_init();
#if CONFIG_USBDEBUG
- sb700_enable_usbdebug(0);
+ sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
rs780_early_setup();
sb700_early_setup();
- #if SET_FIDVID == 1
+ #if CONFIG_SET_FIDVID
msr = rdmsr(0xc0010071);
printk(BIOS_DEBUG, "\nBegin FIDVID MSR 0xc0010071 0x%08x 0x%08x \n", msr.hi, msr.lo);
post_cache_as_ram(); // BSP switch stack to ram, copy then execute LB.
post_code(0x43); // Should never see this post code.
}
-