Move all IOAPIC selection to southbridges, and remove them
[coreboot.git] / src / mainboard / ibm / e326 / cache_as_ram_auto.c
index 2f6a93adfe1c3073148fc5a9868316b1c0ecb9d8..0ec2c52f48a7eaa41a5d74791741144aea4fa27e 100644 (file)
@@ -1,17 +1,19 @@
 #define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
+#include <stdlib.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
-#include "ram/ramtest.c"
+#include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
@@ -77,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdk8/raminit.c"
 #include "resourcemap.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
-#include "sdram/generic_sdram.c"
+#include "lib/generic_sdram.c"
 
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
@@ -95,7 +93,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/model_fxx/init_cpus.c"
 
 
-#if USE_FALLBACK_IMAGE == 1
+#if CONFIG_USE_FALLBACK_IMAGE == 1
 
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
@@ -147,7 +145,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 
-#if USE_FALLBACK_IMAGE == 1
+#if CONFIG_USE_FALLBACK_IMAGE == 1
         failover_process(bist, cpu_init_detectedx);
 #endif
         real_main(bist, cpu_init_detectedx);
@@ -185,7 +183,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
                init_cpus(cpu_init_detectedx);
         }
 
-       pc87366_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       pc87366_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();
 
@@ -211,7 +209,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
        enable_smbus();
 
        memreset_setup();
-       sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+       sdram_initialize(ARRAY_SIZE(cpu), cpu);
 
        post_cache_as_ram();