Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / ibase / mb899 / romstage.c

diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 8d4ca81254283cad1a16c0bd047081719208ce13..b9d2f99f62fd0496eb6731482b8b5eb874a8eed3 100644 (file)
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -19,11 +19,6 @@
 
 // __PRE_RAM__ means: use "unsigned" for device, not a struct.
 
-/* Configuration of the i945 driver */
-#define CHIPSET_I945GM 1
-//#define OVERRIDE_CLOCK_DISABLE 1
-#define CHANNEL_XOR_RANDOMIZATION 1
-
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
@@ -31,30 +26,22 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-
+#include <lib.h>
 #include "superio/winbond/w83627ehg/w83627ehg.h"
-
 #include <pc80/mc146818rtc.h>
-
 #include <console/console.h>
+#include <usbdebug.h>
 #include <cpu/x86/bist.h>
-
-#if CONFIG_USBDEBUG
-#define DBGP_DEFAULT 1
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
 #include "superio/winbond/w83627ehg/w83627ehg_early_serial.c"
-
-#include "northbridge/intel/i945/udelay.c"
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
+#include "southbridge/intel/i82801gx/i82801gx.h"
 
 #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1)
 
-#include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+void enable_smbus(void);
+
+void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");
        /* General Registers */
@@ -70,18 +57,6 @@ static void setup_ich7_gpios(void)
        outl(0x00010035, DEFAULT_GPIOBASE + 0x38);      /* GP_LVL */
 }
 
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-       return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
 static void ich7_enable_lpc(void)
 {
        // Enable Serial IRQ
@@ -264,9 +239,8 @@ void main(unsigned long bist)
        u32 reg32;
        int boot_mode = 0;
 
-       if (bist == 0) {
+       if (bist == 0)
                enable_lapic();
-       }
 
        ich7_enable_lpc();
        early_superio_config_w83627ehg();
@@ -275,7 +249,7 @@ void main(unsigned long bist)
        uart_init();
 
 #if CONFIG_USBDEBUG
-       i82801gx_enable_usbdebug(DBGP_DEFAULT);
+       i82801gx_enable_usbdebug(1);
        early_usbdebug_init();
 #endif
 
@@ -378,4 +352,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-