Remove duplicate line from pci_ids.h.

[coreboot.git] / src / mainboard / hp / dl145_g3 / romstage.c

diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index 218304e2f5ce9b7ca9378bf842f3f4f2fa3c1a1d..8019361b24ce67a40bfa76f4d0f16cb9e244a3ee 100644 (file)
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -25,8 +25,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1
@@ -44,8 +42,6 @@
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
 #endif
 
-#define DBGP_DEFAULT 7
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -54,12 +50,9 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
 
@@ -185,7 +178,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                DIMM5, DIMM7, 0, 0,
        };
 
-       struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
+       struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
+               + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
 
        int needs_reset;
        unsigned bsp_apicid = 0;
@@ -216,8 +210,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 //     setup_early_ipmi_serial();
        pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
-
-       print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
+       printk(BIOS_DEBUG, "bsp_apicid=%02x\n", bsp_apicid);
 
 #if CONFIG_MEM_TRAIN_SEQ == 1
        set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
@@ -243,7 +236,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
-               print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+               printk(BIOS_DEBUG, "begin msr fid, vid %08x %08x\n", msr.hi, msr.lo);
        }
        enable_fid_change();
        enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn);
@@ -252,7 +245,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        {
                msr_t msr;
                msr=rdmsr(0xc0010042);
-               print_debug("end   msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
+               printk(BIOS_DEBUG, "end msr fid, vid %08x %08x\n", msr.hi, msr.lo);
        }
 #endif
 
@@ -261,7 +254,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
        // fidvid change will issue one LDTSTOP and the HT change will be effective too
        if (needs_reset) {
-               print_info("ht reset -\n");
+               printk(BIOS_INFO, "ht reset -\n");
                soft_reset();
        }
 
@@ -278,6 +271,5 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
 
        post_cache_as_ram();
-
 }