Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / hp / dl145_g3 / Kconfig
index 3d70aac6d74c973239ca45cc221a6e82fb19ae46..8be67520ad7e328a5fbfc9fea787c494dc236c9e 100644 (file)
@@ -1,88 +1,79 @@
-config BOARD_HP_DL145_G3
-       bool "ProLiant DL145 G3"
+if BOARD_HP_DL145_G3
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
        select CPU_AMD_SOCKET_F
+       select DIMM_DDR2
+       select DIMM_REGISTERED
        select NORTHBRIDGE_AMD_AMDK8
        select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
        select SOUTHBRIDGE_BROADCOM_BCM21000
        select SOUTHBRIDGE_BROADCOM_BCM5785
        select SUPERIO_NSC_PC87417
        select HAVE_BUS_CONFIG
+       select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
        select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select BOARD_ROMSIZE_KB_512
+       select RAMINIT_SYSINFO
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+       select QRANK_DIMM_SUPPORT
+       select K8_ALLOCATE_IO_RANGE
+       select SET_FIDVID
 
 config MAINBOARD_DIR
        string
        default hp/dl145_g3
-       depends on BOARD_HP_DL145_G3
 
 config DCACHE_RAM_BASE
        hex
        default 0xcc000
-       depends on BOARD_HP_DL145_G3
 
 config DCACHE_RAM_SIZE
        hex
        default 0x04000
-       depends on BOARD_HP_DL145_G3
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
        default 0x01000
-       depends on BOARD_HP_DL145_G3
 
 config APIC_ID_OFFSET
        hex
        default 0x8
-       depends on BOARD_HP_DL145_G3
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_HP_DL145_G3
 
 config MAINBOARD_PART_NUMBER
        string
        default "ProLiant DL145 G3"
-       depends on BOARD_HP_DL145_G3
-
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-       depends on BOARD_HP_DL145_G3
 
 config MAX_CPUS
        int
        default 4
-       depends on BOARD_HP_DL145_G3
 
 config MAX_PHYSICAL_CPUS
        int
        default 2
-       depends on BOARD_HP_DL145_G3
 
 config HT_CHAIN_END_UNITID_BASE
        hex
        default 0x1
-       depends on BOARD_HP_DL145_G3
 
 config HT_CHAIN_UNITID_BASE
        hex
        default 0x6
-       depends on BOARD_HP_DL145_G3
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_HP_DL145_G3
 
 config IRQ_SLOT_COUNT
        int
        default 15
-       depends on BOARD_HP_DL145_G3
+
+endif # BOARD_HP_DL145_G3