Move "select CACHE_AS_RAM" lines from boards into CPU socket.

[coreboot.git] / src / mainboard / gigabyte / ma785gmt / Kconfig

diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig
index c6cb21dfedef60f2b570c963d7c78693569ade9c..de5bfe0cf2fefdc8d76eb26777a0c1d7e713386b 100644 (file)
--- a/src/mainboard/gigabyte/ma785gmt/Kconfig
+++ b/src/mainboard/gigabyte/ma785gmt/Kconfig
@@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
        select HAVE_MAINBOARD_RESOURCES
-       select CACHE_AS_RAM
        select HAVE_HARD_RESET
        select SB_HT_CHAIN_UNITID_OFFSET_ONLY
        select LIFT_BSP_APIC_ID
@@ -94,8 +93,4 @@ config RAMBASE
        hex
        default 0x200000
 
-config COMPRESS
-       hex
-       default 0
-
 endif # BOARD_GIGABYTE_GA785GMT