Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / gigabyte / m57sli / romstage.c

diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index d7a7a3bb4c75599a45bf736904a07fd040157ca8..7665c7b622303a19888e416b20c062414b69c025 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -19,27 +19,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
-#define K8_ALLOCATE_IO_RANGE 1
-
-#define QRANK_DIMM_SUPPORT 1
-
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#endif
-
-//used by init_cpus and fidvid
-#define SET_FIDVID 1
-//if we want to wait for core1 done before DQS training, set it to 0
-#define SET_FIDVID_CORE0_ONLY 1
-
 #if CONFIG_K8_REV_F_SUPPORT == 1
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
 #endif
 
-#define DBGP_DEFAULT 7
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -48,15 +31,11 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
-#if CONFIG_USBDEBUG_DIRECT
-#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-#include "lib/ramtest.c"
+#include <usbdebug.h>
+#include <spd.h>
 
 #include <cpu/amd/model_fxx_rev.h>
 
@@ -97,10 +76,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
        return smbus_read_byte(device, address);
 }
 
-#define MCP55_NUM 1
-#define MCP55_USE_NIC 1
-#define MCP55_USE_AZA 1
-
 #define MCP55_PCI_E_X_0 0
 
 #define MCP55_MB_SETUP \
@@ -157,11 +132,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
        static const uint16_t spd_addr [] = {
                        // Node 0
-                       (0xa<<3)|0, (0xa<<3)|2, 0, 0,
-                       (0xa<<3)|1, (0xa<<3)|3, 0, 0,
+                       DIMM0, DIMM2, 0, 0,
+                       DIMM1, DIMM3, 0, 0,
                        // Node 1
-                       (0xa<<3)|4, (0xa<<3)|6, 0, 0,
-                       (0xa<<3)|5, (0xa<<3)|7, 0, 0,
+                       DIMM4, DIMM6, 0, 0,
+                       DIMM5, DIMM7, 0, 0,
        };
 
         struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE
@@ -212,8 +187,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
-#if CONFIG_USBDEBUG_DIRECT
-       mcp55_enable_usbdebug(DBGP_DEFAULT);
+#if CONFIG_USBDEBUG
+       mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
        early_usbdebug_init();
 #endif
         console_init();
@@ -240,7 +215,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         /* it will set up chains and store link pair for optimization later */
         ht_setup_chains_x(sysinfo); // it will init sblnk and sbbusn, nodes, sbdn
 
-#if SET_FIDVID == 1
+#if CONFIG_SET_FIDVID
 
         {
                 msr_t msr;