remove usbdebug.h include from mainboard/romstage code

[coreboot.git] / src / mainboard / gigabyte / m57sli / romstage.c

diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 968e384021666f853fc742236a5f14e83f50f309..16d24539722c78886397faa282a0cbc95a8575ce 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -33,22 +33,21 @@
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include <usbdebug.h>
 #include <spd.h>
 #include <cpu/amd/model_fxx_rev.h>
-#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
+#include "southbridge/nvidia/mcp55/early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8716f/it8716f_early_serial.c"
-#include "superio/ite/it8716f/it8716f_early_init.c"
+#include "superio/ite/it8716f/early_serial.c"
+#include "superio/ite/it8716f/early_init.c"
 #include "cpu/x86/bist.h"
 #include "northbridge/amd/amdk8/debug.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "northbridge/amd/amdk8/setup_resource_map.c"
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
+#include "southbridge/nvidia/mcp55/early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
 #define GPIO_DEV PNP_DEV(0x2e, IT8716F_GPIO)
@@ -69,9 +68,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
         RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+59, 0x00, 0x60,/* GPIP60 FANCTL0 */ \
         RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
 
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
-#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-#include "northbridge/amd/amdk8/amdk8_f.h"
+#include "southbridge/nvidia/mcp55/early_setup_ss.h"
+#include "southbridge/nvidia/mcp55/early_setup_car.c"
+#include "northbridge/amd/amdk8/f.h"
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
 #include "northbridge/amd/amdk8/raminit_f.c"
@@ -81,7 +80,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/car/post_cache_as_ram.c"
 #include "cpu/amd/model_fxx/init_cpus.c"
 #include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
 static void sio_setup(void)
@@ -124,7 +122,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
                /* Allow the HT devices to be found */
                enumerate_ht_chain();
                sio_setup();
-               mcp55_enable_rom();
         }
 
         if (bist == 0)
@@ -147,16 +144,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         setup_mb_resource_map();
 
-        uart_init();
+        console_init();
 
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
-#if CONFIG_USBDEBUG
-       mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
-       early_usbdebug_init();
-#endif
-        console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
 
         print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");