Get mptable OEM/product ID from kconfig variables.

[coreboot.git] / src / mainboard / gigabyte / m57sli / mptable.c

diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index ba8ab7f7e0071b0fee85165553d075c14c238ea8..28b2858413bd26cf414ee094eae99df015349c67 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -25,56 +25,28 @@
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
-
 #include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
+
 extern unsigned char bus_mcp55[8]; //1
 
 extern unsigned apicid_mcp55;
 
-extern unsigned bus_type[256]; 
-
-extern void get_bus_conf(void);
-
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
 {
-        static const char sig[4] = "PCMP";
-        static const char oem[8] = "GIGABYTE";
-        static const char productid[12] = "M57SLI      ";
         struct mp_config_table *mc;
        unsigned sbdn;
-
-       int i,j,k;
+       int i, j, k, bus_isa;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-        memset(mc, 0, sizeof(*mc));
-
-        memcpy(mc->mpc_signature, sig, sizeof(sig));
-        mc->mpc_length = sizeof(*mc); /* initially just the header */
-        mc->mpc_spec = 0x04;
-        mc->mpc_checksum = 0; /* not yet computed */
-        memcpy(mc->mpc_oem, oem, sizeof(oem));
-        memcpy(mc->mpc_productid, productid, sizeof(productid));
-        mc->mpc_oemptr = 0;
-        mc->mpc_oemsize = 0;
-        mc->mpc_entry_count = 0; /* No entries yet... */
-        mc->mpc_lapic = LAPIC_ADDR;
-        mc->mpe_length = 0;
-        mc->mpe_checksum = 0;
-        mc->reserved = 0;
+
+       mptable_init(mc, LAPIC_ADDR);
 
         smp_write_processors(mc);
 
        get_bus_conf();
        sbdn = sysconf.sbdn;
 
-/*Bus:         Bus ID  Type*/
-       /* define bus and isa numbers */
-        for(j= 0; j < 256 ; j++) {
-               if(bus_type[j])
-                        smp_write_bus(mc, j, "PCI   ");
-        }
-        smp_write_bus(mc, bus_isa, "ISA   ");
+       mptable_write_buses(mc, NULL, &bus_isa);
 
 /*I/O APICs:   APIC ID Version State           Address*/
         {
@@ -94,26 +66,7 @@ void *smp_write_config_table(void *v)
                 }
        }
 
-       /*I/O Ints:          Type       Trigger    Polarity                       Bus ID   IRQ  APIC ID       PIN# */   
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_mcp55, 0x0);
-
-/* ISA ints are edge-triggered, and usually originate from the ISA bus,
- * or its remainings.
- */
-#define ISA_INT(intr, pin)\
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, (intr), apicid_mcp55, (pin))
-
-       ISA_INT(1,1);
-       ISA_INT(0,2);
-       ISA_INT(3,3);
-       ISA_INT(4,4);
-       ISA_INT(6,6);
-       ISA_INT(7,7);
-       ISA_INT(8,8);
-       ISA_INT(12,12);
-       ISA_INT(13,13);
-       ISA_INT(14,14);
-       ISA_INT(15,15);
+       mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0);
 
 /* PCI interrupts are level triggered, and are
  * associated with a specific bus/device/function tuple.
@@ -122,7 +75,7 @@ void *smp_write_config_table(void *v)
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,\
                         bus_mcp55[bus], (((dev)<<2)|(fn)), apicid_mcp55, (pin))
 
-       PCI_INT(0,sbdn+1,1, 10); /* SMBus */ 
+       PCI_INT(0,sbdn+1,1, 10); /* SMBus */
        PCI_INT(0,sbdn+2,0, 22); /* USB */
        PCI_INT(0,sbdn+2,1, 23); /* USB */
        PCI_INT(0,sbdn+4,0, 21); /* IDE */
@@ -144,8 +97,8 @@ void *smp_write_config_table(void *v)
         }
 
        /* On bus 1: the PCI bus slots...
-          pyhsical PCI slots are j = 7,8 
-          FireWire is j = 10           
+          physical PCI slots are j = 7,8
+          FireWire is j = 10
        */
         k=2;
         for(i=0; i<4; i++){
@@ -157,14 +110,14 @@ void *smp_write_config_table(void *v)
         }
 
 /*Local Ints:  Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
-       smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
+       smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+       smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
        /* There is no extension information... */
 
        /* Compute the checksums */
        mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
        mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-       printk_debug("Wrote the mp table end at: %p - %p\n",
+       printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
                mc, smp_next_mpe_entry(mc));
        return smp_next_mpe_entry(mc);
 }