Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / gigabyte / m57sli / irq_tables.c

diff --git a/src/mainboard/gigabyte/m57sli/irq_tables.c b/src/mainboard/gigabyte/m57sli/irq_tables.c
index 1bdae9830d10a2c8ee5255a73dab2778c307b201..bc6aded97fc4aaec05c0950d111d91aab9e7fa44 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/irq_tables.c
+++ b/src/mainboard/gigabyte/m57sli/irq_tables.c
@@ -19,7 +19,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -33,11 +33,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
                uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
                uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -53,6 +53,8 @@ static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t dev
 extern unsigned char bus_isa;
 extern unsigned char bus_mcp55[8]; //1
 
+
+
 unsigned long write_pirq_routing_table(unsigned long addr)
 {
 
@@ -73,19 +75,19 @@ unsigned long write_pirq_routing_table(unsigned long addr)
         addr &= ~15;
 
         /* This table must be betweeen 0xf0000 & 0x100000 */
-        printk_info("Writing IRQ routing tables to 0x%x...", addr);
+        printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
 
        pirq = (void *)(addr);
        v = (uint8_t *)(addr);
-       
+
        pirq->signature = PIRQ_SIGNATURE;
        pirq->version  = PIRQ_VERSION;
-       
+
        pirq->rtr_bus = bus_mcp55[0];
        pirq->rtr_devfn = ((sbdn+6)<<3)|0;
 
        pirq->exclusive_irqs = 0;
-       
+
        pirq->rtr_vendor = 0x10de;
        pirq->rtr_device = 0x0370;
 
@@ -98,11 +100,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //pci bridge
        write_pirq_info(pirq_info, bus_mcp55[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
        pirq_info++; slot_num++;
-        
-       pirq->size = 32 + 16 * slot_num; 
+
+       pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];   
+                sum += v[i];
 
        sum = pirq->checksum - sum;
 
@@ -110,7 +112,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
                 pirq->checksum = sum;
         }
 
-       printk_info("done.\n");
+       printk(BIOS_INFO, "done.\n");
 
        return  (unsigned long) pirq_info;