Please bear with me - another rename checkin. This qualifies as trivial, no

[coreboot.git] / src / mainboard / gigabyte / m57sli / Config.lb

diff --git a/src/mainboard/gigabyte/m57sli/Config.lb b/src/mainboard/gigabyte/m57sli/Config.lb
index 8fece774e9aaccd1c525ffd32f8ec7fbc7354ef5..0f27a7ab444e9d3d6d114f2eaf1dae8b4082d2d8 100644 (file)
--- a/src/mainboard/gigabyte/m57sli/Config.lb
+++ b/src/mainboard/gigabyte/m57sli/Config.lb
@@ -1,5 +1,5 @@
 ## 
-## This file is part of the LinuxBIOS project.
+## This file is part of the coreboot project.
 ## 
 ## Copyright (C) 2007 AMD
 ## Written by Yinghai Lu <yinghailu@amd.com> for AMD.
@@ -310,7 +310,7 @@ chip northbridge/amd/amdk8/root_complex
                                        # SIO pin set 1 input mode
                                                                #irq 0xc8 = 0x0
                                        # SIO pin set 2 mixed input/output mode
-                                                               irq 0xc9 = 0x0
+                                                               irq 0xc9 = 0x40
                                        # SIO pin set 4 input mode
                                                                #irq 0xcb = 0x0
                                        # Generate SMI# on EC IRQ