Fix all warnings in the tree

[coreboot.git] / src / mainboard / gigabyte / ga_2761gxdk / romstage.c

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 3ba256a606227d90003daa3ecdef1ff534a55f10..e4762bfd092a766fc494a884e833332f274c22e1 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -50,11 +50,10 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 
 #include <console/console.h>
-#if CONFIG_USBDEBUG_DIRECT
+#if CONFIG_USBDEBUG
 #include "southbridge/sis/sis966/sis966_enable_usbdebug.c"
 #include "pc80/usbdebug_serial.c"
 #endif
@@ -124,9 +123,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
         RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+60, 0x00, 0x60,/* GPIO61 FANCTL1 */
 
 #include "southbridge/sis/sis966/sis966_early_setup_ss.h"
-#include "southbridge/sis/sis966/sis966_early_setup_car.c"
-
-
 
 #include "cpu/amd/car/post_cache_as_ram.c"
 
@@ -199,9 +195,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
-#if CONFIG_USBDEBUG_DIRECT
-       sis966_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+#if CONFIG_USBDEBUG
+       sis966_enable_usbdebug(DBGP_DEFAULT);
+       early_usbdebug_init();
 #endif
         console_init();
        printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);