Get mptable OEM/product ID from kconfig variables.

[coreboot.git] / src / mainboard / gigabyte / ga_2761gxdk / mptable.c

diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
index aaa0a94ee1ff85cf4e8854bfef377bbe5e7456ad..c38d7f6e064930f456c17dded3448a3b1158bc97 100644 (file)
--- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
@@ -26,54 +26,28 @@
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
-
 #include <cpu/amd/amdk8_sysconf.h>
-extern unsigned char bus_isa;
+
 extern unsigned char bus_sis966[8]; //1
 
 extern unsigned apicid_sis966;
 
-extern unsigned bus_type[256];
-
 static void *smp_write_config_table(void *v)
 {
-        static const char sig[4] = "PCMP";
-        static const char oem[8] = "COREBOOT";
-        static const char productid[12] = "GA-2761GXDK ";
         struct mp_config_table *mc;
        unsigned sbdn;
-
-       int i,j;
+       int i, j, bus_isa;
 
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-        memset(mc, 0, sizeof(*mc));
-
-        memcpy(mc->mpc_signature, sig, sizeof(sig));
-        mc->mpc_length = sizeof(*mc); /* initially just the header */
-        mc->mpc_spec = 0x04;
-        mc->mpc_checksum = 0; /* not yet computed */
-        memcpy(mc->mpc_oem, oem, sizeof(oem));
-        memcpy(mc->mpc_productid, productid, sizeof(productid));
-        mc->mpc_oemptr = 0;
-        mc->mpc_oemsize = 0;
-        mc->mpc_entry_count = 0; /* No entries yet... */
-        mc->mpc_lapic = LAPIC_ADDR;
-        mc->mpe_length = 0;
-        mc->mpe_checksum = 0;
-        mc->reserved = 0;
+
+       mptable_init(mc, LAPIC_ADDR);
 
         smp_write_processors(mc);
 
        get_bus_conf();
        sbdn = sysconf.sbdn;
 
-/*Bus:         Bus ID  Type*/
-       /* define bus and isa numbers */
-        for(j= 0; j < 256 ; j++) {
-               if(bus_type[j])
-                        smp_write_bus(mc, j, "PCI   ");
-        }
-        smp_write_bus(mc, bus_isa, "ISA   ");
+       mptable_write_buses(mc, NULL, &bus_isa);
 
 /*I/O APICs:   APIC ID Version State           Address*/
         {
@@ -100,26 +74,7 @@ static void *smp_write_config_table(void *v)
                 }
        }
 
-       /* I/O Ints:    Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_sis966, 0x0);
-
-/* ISA ints are edge-triggered, and usually originate from the ISA bus,
- * or its remainings.
- */
-#define ISA_INT(intr, pin)\
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,  bus_isa, (intr), apicid_sis966,(pin))
-
-       ISA_INT(0x1, 0x1);
-       ISA_INT(0x0, 0x2);
-       ISA_INT(0x3, 0x3);
-       ISA_INT(0x4, 0x4);
-       ISA_INT(0x6, 0x6);
-       ISA_INT(0x7, 0x7);
-       ISA_INT(0x8, 0x8);
-       ISA_INT(0xc, 0xc);
-       ISA_INT(0xd, 0xd);
-       ISA_INT(0xe, 0xe);
-       ISA_INT(0xf, 0xf);
+       mptable_add_isa_interrupts(mc, bus_isa, apicid_sis966, 0);
 
 /* PCI interrupts are level triggered, and are
  * associated with a specific bus/device/function tuple.
@@ -149,8 +104,8 @@ static void *smp_write_config_table(void *v)
                }
 
 /*Local Ints:  Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN#*/
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
-       smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
+       smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
+       smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
        /* There is no extension information... */
 
        /* Compute the checksums */