Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / gigabyte / ga_2761gxdk / Kconfig
index ac2f2ede6187b9ab8fe5ac5e6112b0d102db2ec7..6571b318ed64738645449bd22e6b63ab698ca412 100644 (file)
-config BOARD_GIGABYTE_GA_2761GXDK
-       bool "GA-2761GXDK"
+if BOARD_GIGABYTE_GA_2761GXDK
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
        select ARCH_X86
        select CPU_AMD_SOCKET_AM2
+       select DIMM_DDR2
        select NORTHBRIDGE_AMD_AMDK8
        select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
        select SOUTHBRIDGE_SIS_SIS966
        select SUPERIO_ITE_IT8716F
        select HAVE_BUS_CONFIG
+       select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
-       select USE_PRINTK_IN_CAR
-       select USE_DCACHE_RAM
+       select HAVE_MP_TABLE
        select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
+       select RAMINIT_SYSINFO
+       select QRANK_DIMM_SUPPORT
+       select K8_ALLOCATE_IO_RANGE
+       select SET_FIDVID
+
 config MAINBOARD_DIR
        string
        default gigabyte/ga_2761gxdk
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config DCACHE_RAM_BASE
        hex
        default 0xc8000
-       depends on BOARD_GIGABYTE_GA_2761GXDK
-       
+
 config DCACHE_RAM_SIZE
        hex
        default 0x08000
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config DCACHE_RAM_GLOBAL_VAR_SIZE
        hex
        default 0x01000
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config APIC_ID_OFFSET
-       hex     
+       hex
        default 0x10
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config MEM_TRAIN_SEQ
        int
        default 2
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config SB_HT_CHAIN_ON_BUS0
        int
        default 2
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config MAINBOARD_PART_NUMBER
        string
        default "GA-2761GXDK"
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config PCI_64BIT_PREF_MEM
        bool
-        default n
-       depends on BOARD_GIGABYTE_GA_2761GXDK
-
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-       depends on BOARD_GIGABYTE_GA_2761GXDK
+       default n
 
 config MAX_CPUS
        int
        default 2
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config MAX_PHYSICAL_CPUS
        int
        default 1
-       depends on BOARD_GIGABYTE_GA_2761GXDK
-
-config HW_MEM_HOLE_SIZE_AUTO_INC
-       bool    
-       default n
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HT_CHAIN_UNITID_BASE
        hex
        default 0x0
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config HT_CHAIN_END_UNITID_BASE
-       hex     
+       hex
        default 0x20
-       depends on BOARD_GIGABYTE_GA_2761GXDK
-
-config USE_INIT
-       bool
-       default n
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config SERIAL_CPU_INIT
-       bool    
+       bool
        default n
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
        hex
        default 0x1039
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
        hex
        default 0x1234
-       depends on BOARD_GIGABYTE_GA_2761GXDK
 
 config IRQ_SLOT_COUNT
        int
        default 11
-       depends on BOARD_GIGABYTE_GA_2761GXDK
+
+endif # BOARD_GIGABYTE_GA_2761GXDK