Move "select CACHE_AS_RAM" lines from boards into CPU socket.
[coreboot.git] / src / mainboard / gigabyte / ga_2761gxdk / Kconfig
index 1b17b6594c9cd2a2dd8a9d2fe041f6f7ca1d092d..6571b318ed64738645449bd22e6b63ab698ca412 100644 (file)
@@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        def_bool y
        select ARCH_X86
        select CPU_AMD_SOCKET_AM2
+       select DIMM_DDR2
        select NORTHBRIDGE_AMD_AMDK8
        select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
        select SOUTHBRIDGE_SIS_SIS966
@@ -11,11 +12,15 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_BUS_CONFIG
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
-       select CACHE_AS_RAM
+       select HAVE_MP_TABLE
        select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select K8_REV_F_SUPPORT
        select BOARD_ROMSIZE_KB_512
+       select RAMINIT_SYSINFO
+       select QRANK_DIMM_SUPPORT
+       select K8_ALLOCATE_IO_RANGE
+       select SET_FIDVID
 
 config MAINBOARD_DIR
        string
@@ -53,10 +58,6 @@ config PCI_64BIT_PREF_MEM
        bool
        default n
 
-config HW_MEM_HOLE_SIZEK
-       hex
-       default 0x100000
-
 config MAX_CPUS
        int
        default 2
@@ -65,10 +66,6 @@ config MAX_PHYSICAL_CPUS
        int
        default 1
 
-config HW_MEM_HOLE_SIZE_AUTO_INC
-       bool
-       default n
-
 config HT_CHAIN_UNITID_BASE
        hex
        default 0x0