Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / getac / p470 / romstage.c

diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 0da4b8f2934830469702d6179a33d8696f26d3d7..c8753309999f279d2f3fe7632bbe9b20cdf8cf36 100644 (file)
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -19,10 +19,6 @@
  * MA 02110-1301 USA
  */
 
-/* Configuration of the i945 driver */
-#define CHIPSET_I945GM 1
-#define CHANNEL_XOR_RANDOMIZATION 1
-
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
@@ -30,26 +26,18 @@
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
-
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-
+#include <lib.h>
+#include <usbdebug.h>
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
 #include <cpu/x86/bist.h>
+#include "northbridge/intel/i945/i945.h"
+#include "northbridge/intel/i945/raminit.h"
+#include "southbridge/intel/i82801gx/i82801gx.h"
 
-#if CONFIG_USBDEBUG_DIRECT
-#define DBGP_DEFAULT 0
-#include "southbridge/intel/i82801gx/i82801gx_usb_debug.c"
-#include "pc80/usbdebug_serial.c"
-#endif
-
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82801gx/i82801gx_early_smbus.c"
-
-#include "northbridge/intel/i945/udelay.c"
+void enable_smbus(void);
 
-#include "southbridge/intel/i82801gx/i82801gx.h"
-static void setup_ich7_gpios(void)
+void setup_ich7_gpios(void)
 {
        u32 gpios;
 
@@ -93,18 +81,6 @@ static void setup_ich7_gpios(void)
        outl(gpios, DEFAULT_GPIOBASE + 0x0c);   /* GP_LVL */
 }
 
-#include "northbridge/intel/i945/early_init.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-       return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/i945/raminit.h"
-#include "northbridge/intel/i945/raminit.c"
-#include "northbridge/intel/i945/errata.c"
-#include "northbridge/intel/i945/debug.c"
-
 static void ich7_enable_lpc(void)
 {
        // Enable Serial IRQ
@@ -121,7 +97,6 @@ static void ich7_enable_lpc(void)
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x00040069);
 }
 
-
 /* This box has two superios, so enabling serial becomes slightly excessive.
  * We disable a lot of stuff to make sure that there are no conflicts between
  * the two. Also set up the GPIOs from the beginning. This is the "no schematic
@@ -302,16 +277,14 @@ void main(unsigned long bist)
        u32 reg32;
        int boot_mode = 0;
 
-       if (bist == 0) {
+       if (bist == 0)
                enable_lapic();
-       }
 
 #if 0
        /* Force PCIRST# */
        pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
-       udelay(200);
+       udelay(200 * 1000);
        pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0);
-       udelay(200);
 #endif
 
        ich7_enable_lpc();
@@ -320,9 +293,9 @@ void main(unsigned long bist)
        /* Set up the console */
        uart_init();
 
-#if CONFIG_USBDEBUG_DIRECT
-       i82801gx_enable_usbdebug_direct(DBGP_DEFAULT);
-       early_usbdebug_direct_init();
+#if CONFIG_USBDEBUG
+       i82801gx_enable_usbdebug(1);
+       early_usbdebug_init();
 #endif
        console_init();
 
@@ -382,7 +355,7 @@ void main(unsigned long bist)
 
 #if CONFIG_HAVE_ACPI_RESUME == 0
        /* When doing resume, we must not overwrite RAM */
-#if defined(DEBUG_RAM_SETUP)
+#if CONFIG_DEBUG_RAM_SETUP
        sdram_dump_mchbar_registers();
 
        {
@@ -420,4 +393,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-