#include <arch/romcc_io.h>
#include <cpu/x86/lapic.h>
#include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
#include "s1850_fixups.c"
#include "northbridge/intel/e7520/memory_initialized.c"
#include "cpu/x86/bist.h"
-
-#define SIO_GPIO_BASE 0x680
-#define SIO_XBUS_BASE 0x4880
+#include <spd.h>
#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1)
0 )
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-#define RECVENA_CONFIG 0x0808090a
-#define RECVENB_CONFIG 0x0808090a
-
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
}
-/* this is very highly mainboard dependent, related to wiring */
-/* from factory BIOS via lspci */
-#define DIMM_MAP_LOGICAL 0x2841
#include "northbridge/intel/e7520/raminit.c"
#include "lib/generic_sdram.c"
static inline void ibfzero(void)
{
- while(inb(ipmicsr) & (1<<IBF))
+ while(inb(ipmicsr) & (1<<IBF))
;
}
static inline void clearobf(void)
static inline void waitobf(void)
{
- while((inb(ipmicsr) & (1<<OBF)) == 0)
+ while((inb(ipmicsr) & (1<<OBF)) == 0)
;
}
/* quite possibly the stupidest interface ever designed. */
u16 w;
u32 l;
int do_reset;
- /*
- *
- *
- */
+
static const struct mem_controller mch[] = {
{
.node_id = 0,
*/
/* the wiring on this part is really messed up */
/* this is my best guess so far */
- .channel0 = {(0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, (0xa<<3)|3, },
- .channel1 = {(0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, (0xa<<3)|7, },
+ .channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
+ .channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
}
};
0,
};
- /* using SerialICE, we've seen this basic reset sequence on the dell.
+ /* using SerialICE, we've seen this basic reset sequence on the dell.
* we don't understand it as it uses undocumented registers, but
- * we're going to clone it.
+ * we're going to clone it.
*/
/* enable a hidden device. */
b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
b &= ~0x8;
pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-
+
/* set up LPC bridge bits, some of which reply on undocumented
* registers
*/
-
+
b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
b |= 4;
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);
w = inw(0x866);
outw(w|2, 0x866);
-#if 0
+#if 0
/*seriaice shows
- dell does this so leave it here so I don't forget
+ dell does this so leave it here so I don't forget
*/
/* SMBUS */
pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
b |= 2;
pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-
+
/* ?? */
l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
do_reset = l & 0x8000000;
#endif
disable_watchdogs();
// dump_ipmi_registers();
- mainboard_set_e7520_leds();
-// memreset_setup();
+ mainboard_set_e7520_leds();
sdram_initialize(ARRAY_SIZE(mch), mch);
#if 0
// dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-#if 1 // temporarily disabled
+#if 1 // temporarily disabled
/* Check the first 1M */
// ram_check(0x00000000, 0x000100000);
// ram_check(0x00000000, 0x000a0000);
#if 0
ram_check(0x00000000, 0x02000000);
#endif
-
-#if 0
- while(1) {
- hlt();
- }
-#endif
}
-