Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / dell / s1850 / romstage.c

diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
index 981b5c4fa5f2f67ee8d433cc3099ea968ea63370..04a7cf3f46657409a14849a0bb5e9348b1760c33 100644 (file)
--- a/src/mainboard/dell/s1850/romstage.c
+++ b/src/mainboard/dell/s1850/romstage.c
@@ -5,9 +5,6 @@
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
 #include <console/console.h>
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
@@ -22,9 +19,7 @@
 #include "s1850_fixups.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
-
-#define SIO_GPIO_BASE 0x680
-#define SIO_XBUS_BASE 0x4880
+#include <spd.h>
 
 #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1)
 
@@ -38,17 +33,11 @@
        0 )
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define RECVENA_CONFIG  0x0808090a
-#define RECVENB_CONFIG  0x0808090a
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
 }
 
-/* this is very highly mainboard dependent, related to wiring */
-/* from factory BIOS via lspci */
-#define DIMM_MAP_LOGICAL 0x2841
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 
@@ -78,6 +67,7 @@ static inline void  waitobf(void)
        while((inb(ipmicsr) &  (1<<OBF)) == 0)
                ;
 }
+
 /* quite possibly the stupidest interface ever designed. */
 static inline void  first_cmd_byte(unsigned char byte)
 {
@@ -161,23 +151,14 @@ static void main(unsigned long bist)
        u16 w;
        u32 l;
        int do_reset;
-       /*
-        *
-        *
-        */
+
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
-                       /*
-                       .f0 = PCI_DEV(0, 0x00, 0),
-                       .f1 = PCI_DEV(0, 0x00, 1),
-                       .f2 = PCI_DEV(0, 0x00, 2),
-                       .f3 = PCI_DEV(0, 0x00, 3),
-                       */
                        /* the wiring on this part is really messed up */
                        /* this is my best guess so far */
-                       .channel0 = {(0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, (0xa<<3)|3, },
-                       .channel1 = {(0xa<<3)|4, (0xa<<3)|5, (0xa<<3)|6, (0xa<<3)|7, },
+                       .channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
+                       .channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
                }
        };
 
@@ -274,9 +255,8 @@ static void main(unsigned long bist)
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
+               if (memory_initialized())
                        skip_romstage();
-               }
        }
        /* Setup the console */
        mainboard_set_ich5();
@@ -325,9 +305,8 @@ static void main(unsigned long bist)
 #if 0
 //     dump_spd_registers(&cpu[0]);
        int i;
-       for(i = 0; i < 1; i++) {
+       for(i = 0; i < 1; i++)
                dump_spd_registers();
-       }
 #endif
 #if 1
        show_dram_slots();
@@ -357,11 +336,4 @@ static void main(unsigned long bist)
 #if 0
        ram_check(0x00000000, 0x02000000);
 #endif
-
-#if 0
-       while(1) {
-               hlt();
-       }
-#endif
 }
-