When I started refactoring mainboard Config.lb, I added two different

[coreboot.git] / src / mainboard / asus / p2b / auto.c

diff --git a/src/mainboard/asus/p2b/auto.c b/src/mainboard/asus/p2b/auto.c
index 5b6cc4173a82762fc1faed67ff02e84d0379c114..2e60b1c5262edc8f3fab890d5b463cc7156fec84 100644 (file)
--- a/src/mainboard/asus/p2b/auto.c
+++ b/src/mainboard/asus/p2b/auto.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
  *
  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
  *
@@ -26,12 +26,13 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
+#include <stdlib.h>
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
 #include "northbridge/intel/i440bx/raminit.h"
-#include "mainboard/asus/mew-vm/debug.c"       /* FIXME */
+#include "lib/debug.c"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -47,17 +48,9 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 
 #include "northbridge/intel/i440bx/raminit.c"
 #include "northbridge/intel/i440bx/debug.c"
-#include "sdram/generic_sdram.c"
 
 static void main(unsigned long bist)
 {
-       static const struct mem_controller memctrl[] = {
-               {
-                       .d0 = PCI_DEV(0, 0, 0),
-                       .channel0 = {0x50, 0x51, 0x52, 0x53},
-               }
-       };
-
        if (bist == 0)
                early_mtrr_init();
 
@@ -66,7 +59,9 @@ static void main(unsigned long bist)
        console_init();
        report_bist_failure(bist);
        enable_smbus();
-       /* dump_spd_registers(&memctrl[0]); */
-       sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
+       /* dump_spd_registers(); */
+       sdram_set_registers();
+       sdram_set_spd_registers();
+       sdram_enable();
        /* ram_check(0, 640 * 1024); */
 }