F14 mainboard: mptable update

[coreboot.git] / src / mainboard / asrock / e350m1 / mptable.c

diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c
index 712419a08c40f70b0c1a5dea4296636a900a1026..de9d7f4c647ca3ad262b824f636894a76606aeb1 100644 (file)
--- a/src/mainboard/asrock/e350m1/mptable.c
+++ b/src/mainboard/asrock/e350m1/mptable.c
@@ -60,11 +60,11 @@ static void *smp_write_config_table(void *v)
   mptable_write_buses(mc, NULL, &bus_isa);
 
   /* I/O APICs:   APIC ID Version State   Address */
-  
+
   device_t dev;
   u32 dword;
   u8 byte;
-    
+
   ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
   dword &= 0xFFFFFFF0;
   smp_write_ioapic(mc, apicid_sb800, 0x21, dword);
@@ -90,9 +90,13 @@ static void *smp_write_config_table(void *v)
 #define PCI_INT(bus, dev, fn, pin)
 #endif
 
+  /* APU Internal Graphic Device*/
+  PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]);
+  PCI_INT(0x0, 0x01, 0x1, intr_data[0x03]);
+
   //PCI_INT(0x0, 0x14, 0x1, 0x11); /* IDE. */
   PCI_INT(0x0, 0x14, 0x0, 0x10);
-  /* HD Audio: */
+  /* Southbridge HD Audio: */
   PCI_INT(0x0, 0x14, 0x2, 0x12);
 
   PCI_INT(0x0, 0x12, 0x0, intr_data[0x30]); /* USB */
@@ -105,10 +109,8 @@ static void *smp_write_config_table(void *v)
   /* sata */
   PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
 
-  /* PCI_INT(0x0, 0x14, 0x2, 0x12); */
-
   /* on board NIC & Slot PCIE.  */
-  
+
   /* PCI slots */
   /* PCI_SLOT 0. */
   PCI_INT(bus_sb800[1], 0x5, 0x0, 0x14);
@@ -147,12 +149,7 @@ static void *smp_write_config_table(void *v)
   /* There is no extension information... */
 
   /* Compute the checksums */
-  mc->mpe_checksum =
-      smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
-  mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-  printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
-         mc, smp_next_mpe_entry(mc));
-  return smp_next_mpe_entry(mc);
+  return mptable_finalize(mc);
 }
 
 unsigned long write_smp_table(unsigned long addr)