Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c

[coreboot.git] / src / mainboard / asrock / 939a785gmh / romstage.c

diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c
index 05b63362b410b8d0c4053342f9963098c296edbb..4e1ee79c03c5d77389c8e4e04a8128615dd42305 100644 (file)
--- a/src/mainboard/asrock/939a785gmh/romstage.c
+++ b/src/mainboard/asrock/939a785gmh/romstage.c
@@ -18,9 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
-#define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif
@@ -31,7 +29,6 @@
 #define DIMM0 0x50
 #define DIMM1 0x51
 
-#define ICS951462_ADDRESS      0x69
 #define SMBUS_HUB 0x71
 
 #include <stdint.h>
@@ -41,10 +38,8 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <cpu/x86/lapic.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <pc80/mc146818rtc.h>
+#include <console/console.h>
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
@@ -54,6 +49,7 @@
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/winbond/w83627dhg/w83627dhg_early_serial.c"
+#include <usbdebug.h>
 
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
@@ -178,6 +174,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
        sio_init();
        w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
+
+#if CONFIG_USBDEBUG
+       sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
+       early_usbdebug_init();
+#endif
+
        console_init();
 
        /* Halt if there was a built in self test failure */